From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933867AbcIOGa5 (ORCPT ); Thu, 15 Sep 2016 02:30:57 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:33211 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755583AbcIOGa4 (ORCPT ); Thu, 15 Sep 2016 02:30:56 -0400 Subject: Re: [PATCH] KVM: VMX: Enable MSR-BASED TPR shadow even if w/o APICv To: =?UTF-8?Q?Mika_Penttil=c3=a4?= , Wanpeng Li , linux-kernel@vger.kernel.org, kvm@vger.kernel.org References: <1473839936-3393-1-git-send-email-wanpeng.li@hotmail.com> Cc: Wanpeng Li , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , Wincy Van , Yang Zhang From: Paolo Bonzini Message-ID: <84cd6583-5662-0b0b-43fb-df24c69cb25f@redhat.com> Date: Thu, 15 Sep 2016 08:30:52 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/09/2016 06:08, Mika Penttilä wrote: > On 09/14/2016 10:58 AM, Wanpeng Li wrote: >> From: Wanpeng Li >> >> I observed that kvmvapic(to optimize flexpriority=N or AMD) is used >> to boost TPR access when testing kvm-unit-test/eventinj.flat tpr case >> on my haswell desktop (w/ flexpriority, w/o APICv). Commit (8d14695f9542 >> x86, apicv: add virtual x2apic support) disable virtual x2apic mode >> completely if w/o APICv, and the author also told me that windows guest >> can't enter into x2apic mode when he developed the APICv feature several >> years ago. However, it is not truth currently, Interrupt Remapping and >> vIOMMU is added to qemu and the developers from Intel test windows 8 can >> work in x2apic mode w/ Interrupt Remapping enabled recently. >> >> This patch enables TPR shadow for virtual x2apic mode to boost >> windows guest in x2apic mode even if w/o APICv. >> >> Can pass the kvm-unit-test. >> > > While at it, is the vmx flexpriotity stuff still valid code? > AFAICS it gets enabled iff TPR shadow is on. flexpriority is an Intel commercial name for TPR shadow. Paolo flexpriority > is on when : > > (flexpriority_enabled && lapic_in_kernel && cpu_has_vmx_tpr_shadow && cpu_has_vmx_virtualize_apic_accesses) > > But apic accesses to TPR mmio are not then trapped and TPR changes not reported because > the “use TPR shadow” VM-execution control is 1. > > Thanks, > Mika > > >> Suggested-by: Wincy Van >> Cc: Paolo Bonzini >> Cc: Radim Krčmář >> Cc: Wincy Van >> Cc: Yang Zhang >> Signed-off-by: Wanpeng Li >> --- >> arch/x86/kvm/vmx.c | 41 ++++++++++++++++++++++------------------- >> 1 file changed, 22 insertions(+), 19 deletions(-) >> >> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c >> index 5cede40..e703129 100644 >> --- a/arch/x86/kvm/vmx.c >> +++ b/arch/x86/kvm/vmx.c >> @@ -6336,7 +6336,7 @@ static void wakeup_handler(void) >> >> static __init int hardware_setup(void) >> { >> - int r = -ENOMEM, i, msr; >> + int r = -ENOMEM, i; >> >> rdmsrl_safe(MSR_EFER, &host_efer); >> >> @@ -6464,18 +6464,6 @@ static __init int hardware_setup(void) >> >> set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */ >> >> - for (msr = 0x800; msr <= 0x8ff; msr++) >> - vmx_disable_intercept_msr_read_x2apic(msr); >> - >> - /* TMCCT */ >> - vmx_enable_intercept_msr_read_x2apic(0x839); >> - /* TPR */ >> - vmx_disable_intercept_msr_write_x2apic(0x808); >> - /* EOI */ >> - vmx_disable_intercept_msr_write_x2apic(0x80b); >> - /* SELF-IPI */ >> - vmx_disable_intercept_msr_write_x2apic(0x83f); >> - >> if (enable_ept) { >> kvm_mmu_set_mask_ptes(VMX_EPT_READABLE_MASK, >> (enable_ept_ad_bits) ? VMX_EPT_ACCESS_BIT : 0ull, >> @@ -8435,12 +8423,7 @@ static void vmx_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set) >> return; >> } >> >> - /* >> - * There is not point to enable virtualize x2apic without enable >> - * apicv >> - */ >> - if (!cpu_has_vmx_virtualize_x2apic_mode() || >> - !kvm_vcpu_apicv_active(vcpu)) >> + if (!cpu_has_vmx_virtualize_x2apic_mode()) >> return; >> >> if (!cpu_need_tpr_shadow(vcpu)) >> @@ -8449,8 +8432,28 @@ static void vmx_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set) >> sec_exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL); >> >> if (set) { >> + int msr; >> + >> sec_exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; >> sec_exec_control |= SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE; >> + >> + if (kvm_vcpu_apicv_active(vcpu)) { >> + for (msr = 0x800; msr <= 0x8ff; msr++) >> + vmx_disable_intercept_msr_read_x2apic(msr); >> + >> + /* TMCCT */ >> + vmx_enable_intercept_msr_read_x2apic(0x839); >> + /* TPR */ >> + vmx_disable_intercept_msr_write_x2apic(0x808); >> + /* EOI */ >> + vmx_disable_intercept_msr_write_x2apic(0x80b); >> + /* SELF-IPI */ >> + vmx_disable_intercept_msr_write_x2apic(0x83f); >> + } else if (vmx_exec_control(to_vmx(vcpu)) & CPU_BASED_TPR_SHADOW) { >> + /* TPR */ >> + vmx_disable_intercept_msr_read_x2apic(0x808); >> + vmx_disable_intercept_msr_write_x2apic(0x808); >> + } >> } else { >> sec_exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE; >> sec_exec_control |= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; >> > > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >