From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34592C636CD for ; Sun, 5 Feb 2023 11:04:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229573AbjBELEX (ORCPT ); Sun, 5 Feb 2023 06:04:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229453AbjBELEV (ORCPT ); Sun, 5 Feb 2023 06:04:21 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 505B61D93E for ; Sun, 5 Feb 2023 03:04:20 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0810CB80B8A for ; Sun, 5 Feb 2023 11:04:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 765B5C433D2; Sun, 5 Feb 2023 11:04:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675595057; bh=QkErj+/2eVCWv6V2cI48cqVqB2NL71PCGD/z9VqfL30=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=fJnA/vfqWx029EMgDzXMbD3sz7ZMUJbwXorRq6JJFrucHoucXZiBkKpRKyDtPnyJP BwY368ApUw3BEJla/bUYmZRPuYCUaYQDW1RK6eMAcRHReZRTlWai5HhTTOfT1CBQ9r d8o3eQSDkXPBYJFZAgKWHll/9bDkUsJ+adTPwTVECgDTDg14T0RbjQ48zrN9EHyKPV uC8y7cgBO+G+Z5B+wEWDVuiYlJ3sMJhBUGzzCX/ySDKxusbDqUt7czfocPkPrCbpZY WhY3XGzMQ/hTIafic756cWKa7GivOLBD7E99FgV5Mjg9WrHXU2GAnrPCSqAgmeO1BX r6wLoo5gxwzUQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1pOcoh-007XY7-1l; Sun, 05 Feb 2023 11:04:15 +0000 Date: Sun, 05 Feb 2023 11:04:14 +0000 Message-ID: <86357k1ihd.wl-maz@kernel.org> From: Marc Zyngier To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Daniel Lezcano , Hector Martin , Sven Peter , Alyssa Rosenzweig , Atish Patra , Alistair Francis , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev Subject: Re: [PATCH v16 0/9] RISC-V IPI Improvements In-Reply-To: <20230103141221.772261-1-apatel@ventanamicro.com> References: <20230103141221.772261-1-apatel@ventanamicro.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: apatel@ventanamicro.com, palmer@dabbelt.com, paul.walmsley@sifive.com, tglx@linutronix.de, daniel.lezcano@linaro.org, marcan@marcan.st, sven@svenpeter.dev, alyssa@rosenzweig.io, atishp@atishpatra.org, Alistair.Francis@wdc.com, anup@brainfault.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 03 Jan 2023 14:12:12 +0000, Anup Patel wrote: > > This series aims to improve IPI support in Linux RISC-V in following ways: > 1) Treat IPIs as normal per-CPU interrupts instead of having custom RISC-V > specific hooks. This also makes Linux RISC-V IPI support aligned with > other architectures. > 2) Remote TLB flushes and icache flushes should prefer local IPIs instead > of SBI calls whenever we have specialized hardware (such as RISC-V AIA > IMSIC and RISC-V SWI) which allows S-mode software to directly inject > IPIs without any assistance from M-mode runtime firmware. [...] I'm queuing patches 3 and 9 via the irqchip tree as they are standalone. For the rest, I need an Ack from the riscv maintainers as they change a large amount of arch-specific code, and the couple of irqchip patches depend on these changes. Palmer, Paul? Thanks, M. -- Without deviation from the norm, progress is not possible.