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From: Gavin Shan <gshan@redhat.com>
To: Raghavendra Rao Ananta <rananta@google.com>,
	Marc Zyngier <maz@kernel.org>, Andrew Jones <drjones@redhat.com>,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: kvm@vger.kernel.org, Catalin Marinas <catalin.marinas@arm.com>,
	Peter Shier <pshier@google.com>,
	linux-kernel@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
	Will Deacon <will@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 7/9] tools: Import ARM SMCCC definitions
Date: Tue, 26 Apr 2022 15:24:20 +0800	[thread overview]
Message-ID: <867b0aeb-97f4-8fc0-b37a-42946a1e65ad@redhat.com> (raw)
In-Reply-To: <20220423000328.2103733-8-rananta@google.com>

On 4/23/22 8:03 AM, Raghavendra Rao Ananta wrote:
> Import the standard SMCCC definitions from include/linux/arm-smccc.h.
> 
> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> ---
>   tools/include/linux/arm-smccc.h | 193 ++++++++++++++++++++++++++++++++
>   1 file changed, 193 insertions(+)
>   create mode 100644 tools/include/linux/arm-smccc.h
> 

Reviewed-by: Gavin Shan <gshan@redhat.com>

> diff --git a/tools/include/linux/arm-smccc.h b/tools/include/linux/arm-smccc.h
> new file mode 100644
> index 000000000000..63ce9bebccd3
> --- /dev/null
> +++ b/tools/include/linux/arm-smccc.h
> @@ -0,0 +1,193 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2015, Linaro Limited
> + */
> +#ifndef __LINUX_ARM_SMCCC_H
> +#define __LINUX_ARM_SMCCC_H
> +
> +#include <linux/const.h>
> +
> +/*
> + * This file provides common defines for ARM SMC Calling Convention as
> + * specified in
> + * https://developer.arm.com/docs/den0028/latest
> + *
> + * This code is up-to-date with version DEN 0028 C
> + */
> +
> +#define ARM_SMCCC_STD_CALL	        _AC(0,U)
> +#define ARM_SMCCC_FAST_CALL	        _AC(1,U)
> +#define ARM_SMCCC_TYPE_SHIFT		31
> +
> +#define ARM_SMCCC_SMC_32		0
> +#define ARM_SMCCC_SMC_64		1
> +#define ARM_SMCCC_CALL_CONV_SHIFT	30
> +
> +#define ARM_SMCCC_OWNER_MASK		0x3F
> +#define ARM_SMCCC_OWNER_SHIFT		24
> +
> +#define ARM_SMCCC_FUNC_MASK		0xFFFF
> +
> +#define ARM_SMCCC_IS_FAST_CALL(smc_val)	\
> +	((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
> +#define ARM_SMCCC_IS_64(smc_val) \
> +	((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
> +#define ARM_SMCCC_FUNC_NUM(smc_val)	((smc_val) & ARM_SMCCC_FUNC_MASK)
> +#define ARM_SMCCC_OWNER_NUM(smc_val) \
> +	(((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
> +
> +#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
> +	(((type) << ARM_SMCCC_TYPE_SHIFT) | \
> +	((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
> +	(((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
> +	((func_num) & ARM_SMCCC_FUNC_MASK))
> +
> +#define ARM_SMCCC_OWNER_ARCH		0
> +#define ARM_SMCCC_OWNER_CPU		1
> +#define ARM_SMCCC_OWNER_SIP		2
> +#define ARM_SMCCC_OWNER_OEM		3
> +#define ARM_SMCCC_OWNER_STANDARD	4
> +#define ARM_SMCCC_OWNER_STANDARD_HYP	5
> +#define ARM_SMCCC_OWNER_VENDOR_HYP	6
> +#define ARM_SMCCC_OWNER_TRUSTED_APP	48
> +#define ARM_SMCCC_OWNER_TRUSTED_APP_END	49
> +#define ARM_SMCCC_OWNER_TRUSTED_OS	50
> +#define ARM_SMCCC_OWNER_TRUSTED_OS_END	63
> +
> +#define ARM_SMCCC_FUNC_QUERY_CALL_UID  0xff01
> +
> +#define ARM_SMCCC_QUIRK_NONE		0
> +#define ARM_SMCCC_QUIRK_QCOM_A6		1 /* Save/restore register a6 */
> +
> +#define ARM_SMCCC_VERSION_1_0		0x10000
> +#define ARM_SMCCC_VERSION_1_1		0x10001
> +#define ARM_SMCCC_VERSION_1_2		0x10002
> +#define ARM_SMCCC_VERSION_1_3		0x10003
> +
> +#define ARM_SMCCC_1_3_SVE_HINT		0x10000
> +
> +#define ARM_SMCCC_VERSION_FUNC_ID					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   0, 0)
> +
> +#define ARM_SMCCC_ARCH_FEATURES_FUNC_ID					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   0, 1)
> +
> +#define ARM_SMCCC_ARCH_SOC_ID						\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   0, 2)
> +
> +#define ARM_SMCCC_ARCH_WORKAROUND_1					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   0, 0x8000)
> +
> +#define ARM_SMCCC_ARCH_WORKAROUND_2					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   0, 0x7fff)
> +
> +#define ARM_SMCCC_ARCH_WORKAROUND_3					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   0, 0x3fff)
> +
> +#define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID				\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   ARM_SMCCC_OWNER_VENDOR_HYP,			\
> +			   ARM_SMCCC_FUNC_QUERY_CALL_UID)
> +
> +/* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */
> +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0	0xb66fb428U
> +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1	0xe911c52eU
> +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2	0x564bcaa9U
> +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3	0x743a004dU
> +
> +/* KVM "vendor specific" services */
> +#define ARM_SMCCC_KVM_FUNC_FEATURES		0
> +#define ARM_SMCCC_KVM_FUNC_PTP			1
> +#define ARM_SMCCC_KVM_FUNC_FEATURES_2		127
> +#define ARM_SMCCC_KVM_NUM_FUNCS			128
> +
> +#define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID			\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   ARM_SMCCC_OWNER_VENDOR_HYP,			\
> +			   ARM_SMCCC_KVM_FUNC_FEATURES)
> +
> +#define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED	1
> +
> +/*
> + * ptp_kvm is a feature used for time sync between vm and host.
> + * ptp_kvm module in guest kernel will get service from host using
> + * this hypercall ID.
> + */
> +#define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID				\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
> +			   ARM_SMCCC_SMC_32,				\
> +			   ARM_SMCCC_OWNER_VENDOR_HYP,			\
> +			   ARM_SMCCC_KVM_FUNC_PTP)
> +
> +/* ptp_kvm counter type ID */
> +#define KVM_PTP_VIRT_COUNTER			0
> +#define KVM_PTP_PHYS_COUNTER			1
> +
> +/* Paravirtualised time calls (defined by ARM DEN0057A) */
> +#define ARM_SMCCC_HV_PV_TIME_FEATURES				\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
> +			   ARM_SMCCC_SMC_64,			\
> +			   ARM_SMCCC_OWNER_STANDARD_HYP,	\
> +			   0x20)
> +
> +#define ARM_SMCCC_HV_PV_TIME_ST					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
> +			   ARM_SMCCC_SMC_64,			\
> +			   ARM_SMCCC_OWNER_STANDARD_HYP,	\
> +			   0x21)
> +
> +/* TRNG entropy source calls (defined by ARM DEN0098) */
> +#define ARM_SMCCC_TRNG_VERSION					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
> +			   ARM_SMCCC_SMC_32,			\
> +			   ARM_SMCCC_OWNER_STANDARD,		\
> +			   0x50)
> +
> +#define ARM_SMCCC_TRNG_FEATURES					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
> +			   ARM_SMCCC_SMC_32,			\
> +			   ARM_SMCCC_OWNER_STANDARD,		\
> +			   0x51)
> +
> +#define ARM_SMCCC_TRNG_GET_UUID					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
> +			   ARM_SMCCC_SMC_32,			\
> +			   ARM_SMCCC_OWNER_STANDARD,		\
> +			   0x52)
> +
> +#define ARM_SMCCC_TRNG_RND32					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
> +			   ARM_SMCCC_SMC_32,			\
> +			   ARM_SMCCC_OWNER_STANDARD,		\
> +			   0x53)
> +
> +#define ARM_SMCCC_TRNG_RND64					\
> +	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
> +			   ARM_SMCCC_SMC_64,			\
> +			   ARM_SMCCC_OWNER_STANDARD,		\
> +			   0x53)
> +
> +/*
> + * Return codes defined in ARM DEN 0070A
> + * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
> + */
> +#define SMCCC_RET_SUCCESS			0
> +#define SMCCC_RET_NOT_SUPPORTED			-1
> +#define SMCCC_RET_NOT_REQUIRED			-2
> +#define SMCCC_RET_INVALID_PARAMETER		-3
> +
> +#endif /*__LINUX_ARM_SMCCC_H*/
> 


  reply	other threads:[~2022-04-26  7:24 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-23  0:03 [PATCH v6 0/9] KVM: arm64: Add support for hypercall services selection Raghavendra Rao Ananta
2022-04-23  0:03 ` [PATCH v6 1/9] KVM: arm64: Factor out firmware register handling from psci.c Raghavendra Rao Ananta
2022-04-23  0:03 ` [PATCH v6 2/9] KVM: arm64: Setup a framework for hypercall bitmap firmware registers Raghavendra Rao Ananta
2022-04-25  4:52   ` Reiji Watanabe
2022-04-25 16:46     ` Raghavendra Rao Ananta
2022-04-27  1:46       ` Reiji Watanabe
2022-04-27 17:57         ` Raghavendra Rao Ananta
2022-04-26  6:33   ` Gavin Shan
2022-04-26 16:44     ` Raghavendra Rao Ananta
2022-04-27  1:38       ` Gavin Shan
2022-04-23  0:03 ` [PATCH v6 3/9] KVM: arm64: Add standard hypervisor firmware register Raghavendra Rao Ananta
2022-04-26  6:37   ` Gavin Shan
2022-04-23  0:03 ` [PATCH v6 4/9] KVM: arm64: Add vendor " Raghavendra Rao Ananta
2022-04-25  6:22   ` Reiji Watanabe
2022-04-25 16:51     ` Raghavendra Rao Ananta
2022-04-25 17:12       ` Oliver Upton
2022-04-26  6:40   ` Gavin Shan
2022-04-23  0:03 ` [PATCH v6 5/9] Docs: KVM: Rename psci.rst to hypercalls.rst Raghavendra Rao Ananta
2022-04-26  6:41   ` Gavin Shan
2022-04-23  0:03 ` [PATCH v6 6/9] Docs: KVM: Add doc for the bitmap firmware registers Raghavendra Rao Ananta
2022-04-25  6:31   ` Reiji Watanabe
2022-04-25 16:52     ` Raghavendra Rao Ananta
2022-04-26  6:42   ` Gavin Shan
2022-04-23  0:03 ` [PATCH v6 7/9] tools: Import ARM SMCCC definitions Raghavendra Rao Ananta
2022-04-26  7:24   ` Gavin Shan [this message]
2022-04-23  0:03 ` [PATCH v6 8/9] selftests: KVM: aarch64: Introduce hypercall ABI test Raghavendra Rao Ananta
2022-04-26  7:49   ` Gavin Shan
2022-04-26 16:59     ` Raghavendra Rao Ananta
2022-04-27  2:09       ` Gavin Shan
2022-04-23  0:03 ` [PATCH v6 9/9] selftests: KVM: aarch64: Add the bitmap firmware registers to get-reg-list Raghavendra Rao Ananta

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