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Date: Mon, 28 Apr 2008 16:16:26 -0700
From: "Yinghai Lu" <yhlu.kernel@gmail.com>
To: "Eric W. Biederman" <ebiederm@xmission.com>
Subject: Re: [PATCH] x86_32: trim memory by updating e820 v3
Cc: "Gabriel C" <nix.or.die@googlemail.com>,
       "Andi Kleen" <andi@firstfloor.org>,
       "Andrew Morton" <akpm@linux-foundation.org>,
       "Ingo Molnar" <mingo@elte.hu>, "H. Peter Anvin" <hpa@zytor.com>,
       LKML <linux-kernel@vger.kernel.org>,
       "Jesse Barnes" <jesse.barnes@intel.com>,
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On Mon, Apr 28, 2008 at 11:07 AM, Eric W. Biederman
<ebiederm@xmission.com> wrote:
> "Yinghai Lu" <yhlu.kernel@gmail.com> writes:
>
>  > On Sat, Apr 26, 2008 at 5:56 AM, Gabriel C <nix.or.die@googlemail.com> wrote:
>
>
> > another continuous MTRR mapping.
>  >
>  > several months ago, we were talking about modifying MTRR. but Eric
>  > said that is not safe because acpi and smi...
>
>  I think it was Andi who spotted that originally, and yes I do think it
>  is a pretty horrific failure mode.  Reprogramming the MTRRs requires
>  full knowledge of the hardware and what is going on that we don't
>  always have.  PAT support has just been merged, and using that only
>  requires knowledge about the region whose attributes we intend to change.
>
>  So lets concentrate on PAT to solve contiguous MTRR region problems.
>
>  We can upgrade UC to WC with pat.  As well as demote WB to UC or WC.
>  So for those regions we know about we should be in good shape.
>
>  In a slightly related vein.  Trimming the memory we consider usable by
>  looking at MTRRs and if a region is not WB not considering it RAM
>  sounds like a very reasonable work around for one class of BIOS bugs.

yeah, i will look at to loop the ram region array instead of checking
highest_pfn only...


YH