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From: Loys Ollivier <lollivier@baylibre.com>
To: Paul Walmsley <paul.walmsley@sifive.com>
Cc: linux-kernel@vger.kernel.org, Atish Patra <atish.patra@wdc.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	Paul Walmsley <paul@pwsan.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Subject: Re: [PATCH 1/6] arch: riscv: add support for building DTB files from DT source data
Date: Wed, 22 May 2019 21:18:33 +0200	[thread overview]
Message-ID: <868suyb8mu.fsf@baylibre.com> (raw)
In-Reply-To: <20190411084304.5072-2-paul.walmsley@sifive.com> (Paul Walmsley's message of "Thu, 11 Apr 2019 01:42:59 -0700")

On Thu 11 Apr 2019 at 01:42, Paul Walmsley <paul.walmsley@sifive.com> wrote:

> Similar to ARM64, add support for building DTB files from DT source
> data for RISC-V boards.
>
> This patch starts with the infrastructure needed for SiFive boards.
> Boards from other vendors would add support here in a similar form.
>
> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Albert Ou <aou@eecs.berkeley.edu>

Tested-by: Loys Ollivier <lollivier@baylibre.com>

Tested the whole patch series using FSBL+BBL.
Did basic boot testing and uart validation.

The actual testing process is quite cumbersome.
One needs to rebuild the BBL to update the dtb loaded.

Would you have an idea of the delta between bbl and u-boot ?
I tried booting the same kernel + dtb with U-Boot but ran into
errors related to plic.

Loys

      parent reply	other threads:[~2019-05-22 19:18 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-11  8:42 [PATCH 1/6] arch: riscv: add support for building DTB files from DT source data Paul Walmsley
2019-04-11  8:43 ` [PATCH 2/6] dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 Paul Walmsley
2019-04-29 18:08   ` Rob Herring
2019-04-29 18:13     ` Paul Walmsley
2019-04-11  8:43 ` [PATCH 3/6] dt-bindings: riscv: convert cpu binding to json-schema Paul Walmsley
2019-04-11 12:55   ` Rob Herring
2019-04-11  8:43 ` [PATCH 4/6] riscv: dts: add initial support for the SiFive FU540-C000 SoC Paul Walmsley
2019-04-11 13:10   ` Rob Herring
2019-04-11  8:43 ` [PATCH 5/6] riscv: dts: add initial board data for the SiFive HiFive Unleashed Paul Walmsley
2019-04-11 13:03   ` Rob Herring
2019-04-11  8:43 ` [PATCH 6/6] riscv: defconfig: enable ARCH_SIFIVE Paul Walmsley
2019-04-11 11:46 ` [PATCH 1/6] arch: riscv: add support for building DTB files from DT source data Christoph Hellwig
2019-04-11 21:11   ` Paul Walmsley
2019-04-11 21:52     ` Atish Patra
2019-04-12  0:08       ` Paul Walmsley
2019-04-12  5:49         ` Christoph Hellwig
2019-04-12  7:37         ` Atish Patra
2019-04-11 21:38   ` Atish Patra
2019-05-22 19:18 ` Loys Ollivier [this message]

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