From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751679AbeBAOUW (ORCPT ); Thu, 1 Feb 2018 09:20:22 -0500 Received: from foss.arm.com ([217.140.101.70]:50850 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751561AbeBAOUU (ORCPT ); Thu, 1 Feb 2018 09:20:20 -0500 Date: Thu, 01 Feb 2018 14:20:00 +0000 Message-ID: <86efm46bcf.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Ard Biesheuvel Cc: Linux Kernel Mailing List , linux-arm-kernel , kvmarm , Catalin Marinas , Will Deacon , Peter Maydell , Christoffer Dall , Lorenzo Pieralisi , Mark Rutland , Robin Murphy , Andrew Jones , Hanjun Guo , Jayachandran C , Jon Masters , Russell King - ARM Linux Subject: Re: [PATCH v3 00/18] arm64: Add SMCCC v1.1 support and CVE-2017-5715 (Spectre variant 2) mitigation In-Reply-To: References: <20180201114657.7323-1-marc.zyngier@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: ARM Ltd MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 01 Feb 2018 13:59:45 +0000, Ard Biesheuvel wrote: > > On 1 February 2018 at 11:46, Marc Zyngier wrote: > > ARM has recently published a SMC Calling Convention (SMCCC) > > specification update[1] that provides an optimised calling convention > > and optional, discoverable support for mitigating CVE-2017-5715. ARM > > Trusted Firmware (ATF) has already gained such an implementation[2]. > > > > This series addresses a few things: > > > > - It provides a KVM implementation of PSCI v1.0, which is a > > prerequisite for being able to discover SMCCC v1.1, together with a > > new userspace API to control the PSCI revision number that the guest > > sees. > > > > - It allows KVM to advertise SMCCC v1.1, which is de-facto supported > > already (it never corrupts any of the guest registers). > > > > - It implements KVM support for the ARCH_WORKAROUND_1 function that is > > used to mitigate CVE-2017-5715 in a guest (if such mitigation is > > available on the host). > > > > - It implements SMCCC v1.1 and ARCH_WORKAROUND_1 discovery support in > > the kernel itself. > > > > - It finally provides firmware callbacks for CVE-2017-5715 for both > > kernel and KVM and drop the initial PSCI_GET_VERSION based > > mitigation. > > > > Patch 1 is already merged, and included here for reference. Patches on > > top of arm64/for-next/core. Tested on Seattle and Juno, the latter > > with ATF implementing SMCCC v1.1. > > > > [1]: https://developer.arm.com/support/security-update/downloads/ > > > > [2]: https://github.com/ARM-software/arm-trusted-firmware/pull/1240 > > > > * From v2: > > - Fixed SMC handling in KVM > > - PSCI fixes and tidying up > > - SMCCC primitive rework for better code generation (both efficiency > > and correctness) > > - Remove PSCI_GET_VERSION as a mitigation vector > > > > * From v1: > > - Fixed 32bit build > > - Fix function number sign extension (Ard) > > - Inline SMCCC v1.1 primitives (cpp soup) > > - Prevent SMCCC spamming on feature probing > > - Random fixes and tidying up > > > > Marc Zyngier (18): > > arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls > > arm: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls > > arm64: KVM: Increment PC after handling an SMC trap > > arm/arm64: KVM: Consolidate the PSCI include files > > arm/arm64: KVM: Add PSCI_VERSION helper > > arm/arm64: KVM: Add smccc accessors to PSCI code > > arm/arm64: KVM: Implement PSCI 1.0 support > > arm/arm64: KVM: Add PSCI version selection API > > arm/arm64: KVM: Advertise SMCCC v1.1 > > arm/arm64: KVM: Turn kvm_psci_version into a static inline > > arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support > > arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling > > firmware/psci: Expose PSCI conduit > > firmware/psci: Expose SMCCC version through psci_ops > > arm/arm64: smccc: Make function identifiers an unsigned quantity > > arm/arm64: smccc: Implement SMCCC v1.1 inline primitive > > arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support > > arm64: Kill PSCI_GET_VERSION as a variant-2 workaround > > > > I have given this a spin on my Overdrive, and everything seems to work > as expected, both in the host and in the guest (I single stepped > through the guest to ensure that it gets the expected answer from the > SMCCC feature info call) > > Tested-by: Ard Biesheuvel Awesome, thanks Ard. M. -- Jazz is not dead, it just smell funny.