From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A86A3C61CE4 for ; Sun, 20 Jan 2019 11:36:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8000F2084C for ; Sun, 20 Jan 2019 11:36:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730554AbfATLgj (ORCPT ); Sun, 20 Jan 2019 06:36:39 -0500 Received: from foss.arm.com ([217.140.101.70]:49264 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730484AbfATLgj (ORCPT ); Sun, 20 Jan 2019 06:36:39 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 313CAA78; Sun, 20 Jan 2019 03:36:38 -0800 (PST) Received: from big-swifty.misterjones.org (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 380803F557; Sun, 20 Jan 2019 03:36:33 -0800 (PST) Date: Sun, 20 Jan 2019 11:36:30 +0000 Message-ID: <86h8e3a7cx.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Linus Walleij Cc: Brian Masney , Stephen Boyd , Bjorn Andersson , Andy Gross , Shawn Guo , Doug Anderson , "open list:GPIO SUBSYSTEM" , Nicolas Dechesne , Niklas Cassel , David Brown , Rob Herring , Mark Rutland , "thierry.reding@gmail.com" , linux-arm-msm@vger.kernel.org, "linux-kernel@vger.kernel.org" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Subject: Re: [PATCH v6 00/15] qcom: spmi: add support for hierarchical IRQ chip In-Reply-To: References: <20190119204252.18370-1-masneyb@onstation.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: ARM Ltd MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 19 Jan 2019 23:13:45 +0000, Linus Walleij wrote: > > On Sat, Jan 19, 2019 at 9:43 PM Brian Masney wrote: > > > This patch series adds hierarchical IRQ chip support to spmi-gpio so > > that device tree consumers can request an IRQ directly from the GPIO > > block rather than having to request an IRQ from the underlying PMIC. > > > > For more background information, see the email thread with Linus > > Walleij's excellent description of the problem at > > https://www.spinics.net/lists/linux-gpio/msg34655.html. > > > > This work was tested on a LG Nexus 5 (hammerhead) phone. My status page > > at https://masneyb.github.io/nexus-5-upstream/ describes what is working > > so far with the upstream kernel. > > > > Changes since v5: > > - Patch 4: Set handler to edge or level when the IRQ is mapped. > > - Patch 7: Change IRQ_TYPE_NONE to IRQ_TYPE_EDGE_RISING > > - Patch 14: New patch to validate type when mapping IRQ > > If Marc Z is happy I think I will apply all patches on an immutable branch in As a matter of fact, I am! > the pin control tree, so that ARM SoC and GPIO can pull it in later if need > be. (E.g. if they get conflicts.) > > I was thinking to also include the DTS changes as it all is so neatly > coupled, then offer the branch to ARM SoC. > > Anyone against? No objection from me whatsoever. Thanks, M. -- Jazz is not dead, it just smell funny.