From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 956A0CA9EAE for ; Tue, 29 Oct 2019 09:23:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6874120717 for ; Tue, 29 Oct 2019 09:23:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572341025; bh=/+vM46VmWpHXCwADQhd5+y+nI9Pi8Pytiog6MrqVFXE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=0UzFfq7EowEdDvpcf80u0wdgNgQdz9pDkkiP5Z8VRAjpQDXD2fhwGUZO7YfWgWE9W 2oqhhLDUuJ4KQfWv94QomszzpgGuoPUvJrYq73hU77bdfpj1K24ZIIuSVN7okJtO+s 2j1rsZcvDhUdO11CONC183GldPXJ+crnV7I38WnE= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732582AbfJ2JXo (ORCPT ); Tue, 29 Oct 2019 05:23:44 -0400 Received: from inca-roads.misterjones.org ([213.251.177.50]:50926 "EHLO inca-roads.misterjones.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729316AbfJ2JXo (ORCPT ); Tue, 29 Oct 2019 05:23:44 -0400 Received: from [91.217.168.176] (helo=big-swifty.misterjones.org) by cheepnis.misterjones.org with esmtpsa (TLSv1.2:AES256-GCM-SHA384:256) (Exim 4.80) (envelope-from ) id 1iPNj0-0005iM-ET; Tue, 29 Oct 2019 10:23:38 +0100 Date: Tue, 29 Oct 2019 09:23:37 +0000 Message-ID: <86mudjykfa.wl-maz@kernel.org> From: Marc Zyngier To: Zenghui Yu Cc: , , , , , , , Subject: Re: [PATCH 3/3] KVM: arm/arm64: vgic: Don't rely on the wrong pending table In-Reply-To: <20191029071919.177-4-yuzenghui@huawei.com> References: <20191029071919.177-1-yuzenghui@huawei.com> <20191029071919.177-4-yuzenghui@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 91.217.168.176 X-SA-Exim-Rcpt-To: yuzenghui@huawei.com, eric.auger@redhat.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, wanghaibin.wang@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 29 Oct 2019 07:19:19 +0000, Zenghui Yu wrote: > > It's possible that two LPIs locate in the same "byte_offset" but target > two different vcpus, where their pending status are indicated by two > different pending tables. In such a scenario, using last_byte_offset > optimization will lead KVM relying on the wrong pending table entry. > Let us use last_ptr instead, which can be treated as a byte index into > a pending table and also, can be vcpu specific. > > Signed-off-by: Zenghui Yu > --- > > If this patch has done the right thing, we can even add the: > > Fixes: 280771252c1b ("KVM: arm64: vgic-v3: KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES") > > But to be honest, I'm not clear about what has this patch actually fixed. > Pending tables should contain all zeros before we flush vgic_irq's pending > status into guest's RAM (thinking that guest should never write anything > into it). So the pending table entry we've read from the guest memory > seems always be zero. And we will always do the right thing even if we > rely on the wrong pending table entry. > > I think I must have some misunderstanding here... Please fix me. I think you're spot on, and it is the code needs fixing, not you! The problem is that we only read a byte once, irrespective of the vcpu the interrupts is routed to. If we switch to another vcpu for the same byte offset, we must reload it. This can be done by either checking the vcpu, or by tracking the guest address that we read from (just like you do here). A small comment below: > virt/kvm/arm/vgic/vgic-v3.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c > index 5ef93e5041e1..7cd2e2f81513 100644 > --- a/virt/kvm/arm/vgic/vgic-v3.c > +++ b/virt/kvm/arm/vgic/vgic-v3.c > @@ -363,8 +363,8 @@ int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq) > int vgic_v3_save_pending_tables(struct kvm *kvm) > { > struct vgic_dist *dist = &kvm->arch.vgic; > - int last_byte_offset = -1; > struct vgic_irq *irq; > + gpa_t last_ptr = -1; This should be written as gpa_t last_ptr = ~(gpa_t)0; > int ret; > u8 val; > > @@ -384,11 +384,11 @@ int vgic_v3_save_pending_tables(struct kvm *kvm) > bit_nr = irq->intid % BITS_PER_BYTE; > ptr = pendbase + byte_offset; > > - if (byte_offset != last_byte_offset) { > + if (ptr != last_ptr) { > ret = kvm_read_guest_lock(kvm, ptr, &val, 1); > if (ret) > return ret; > - last_byte_offset = byte_offset; > + last_ptr = ptr; > } > > stored = val & (1U << bit_nr); Otherwise, this looks good to me (no need to respin for the above nit). Eric, can I get an Ack from you, since you write this code? Thanks, M. -- Jazz is not dead, it just smells funny.