From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0604C282CB for ; Tue, 5 Feb 2019 11:04:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A8AE12075D for ; Tue, 5 Feb 2019 11:04:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728510AbfBELEU (ORCPT ); Tue, 5 Feb 2019 06:04:20 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:39674 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726699AbfBELET (ORCPT ); Tue, 5 Feb 2019 06:04:19 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2E99D80D; Tue, 5 Feb 2019 03:04:19 -0800 (PST) Received: from big-swifty.misterjones.org (big-swifty.cambridge.arm.com [10.1.37.129]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B40913F71E; Tue, 5 Feb 2019 03:04:14 -0800 (PST) Date: Tue, 05 Feb 2019 11:04:15 +0000 Message-ID: <86sgx2ts28.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Roger Quadros Cc: Tony Lindgren , , , , , , , , , , , , , , , "Andrew F. Davis" , Thomas Gleixner , Jason Cooper Subject: Re: [PATCH v2 04/14] irqchip: pruss: Add a PRUSS irqchip driver for PRUSS interrupts In-Reply-To: <5C596700.1010000@ti.com> References: <1549290167-876-1-git-send-email-rogerq@ti.com> <1549290167-876-5-git-send-email-rogerq@ti.com> <20190204181518.GN5720@atomide.com> <5C596700.1010000@ti.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: ARM Ltd MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 05 Feb 2019 10:35:44 +0000, Roger Quadros wrote: > > On 04/02/19 20:15, Tony Lindgren wrote: > > * Roger Quadros [190204 14:23]: > >> From: "Andrew F. Davis" > >> > >> The Programmable Real-Time Unit Subsystem (PRUSS) contains an > >> interrupt controller (INTC) that can handle various system input > >> events and post interrupts back to the device-level initiators. > >> The INTC can support upto 64 input events with individual control > >> configuration and hardware prioritization. These events are mapped > >> onto 10 interrupt signals through two levels of many-to-one mapping > >> support. Different interrupt signals are routed to the individual > >> PRU cores or to the host CPU. > >> > >> The PRUSS INTC platform driver manages this PRUSS interrupt > >> controller and implements an irqchip driver to provide a Linux > >> standard way for the PRU client users to enable/disable/ack/ > >> re-trigger a PRUSS system event. The system events to interrupt > >> channels and host interrupts relies on the mapping configuration > >> provided through a firmware resource table for now. This will be > >> revisited and enhanced in the future for a better interface. The > >> mappings will currently be programmed during the boot/shutdown > >> of the PRU. > >> > >> The PRUSS INTC module is reference counted during the interrupt > >> setup phase through the irqchip's irq_request_resources() and > >> irq_release_resources() ops. This restricts the module from being > >> removed as long as there are active interrupt users. > >> > >> The PRUSS INTC can generate an interrupt to various processor > >> subsystems on the SoC through a set of 64 possible PRU system > >> events. These system events can be used by PRU client drivers > >> or applications for event notifications/signalling between PRUs > >> and MPU or other processors. An API, pruss_intc_trigger() is > >> provided to MPU-side PRU client drivers/applications to be able > >> to trigger an event/interrupt using IRQ numbers provided by the > >> PRUSS-INTC irqdomain chip. > > > > I suggest you send the binding patch and the interrupt > > controller driver separately to the irqchip guys. Maybe > > put the trigger function in to a separate patch that can > > be reviewed and applied separately. > > Good idea. I will send irqchip related patches separately. Yes please. But also please document why you have so many non irq-related entry points in this irqchip driver. It seems to replicate the same "events vs irq" stuff we're trying to get rid of in the K3 patches... Thanks, M. -- Jazz is not dead, it just smell funny.