From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20396C4338F for ; Mon, 23 Aug 2021 16:52:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 05CD6613BD for ; Mon, 23 Aug 2021 16:52:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230329AbhHWQw4 convert rfc822-to-8bit (ORCPT ); Mon, 23 Aug 2021 12:52:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:41714 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229883AbhHWQwz (ORCPT ); Mon, 23 Aug 2021 12:52:55 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 47976613BD; Mon, 23 Aug 2021 16:52:12 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mIDBC-006hgo-DX; Mon, 23 Aug 2021 17:52:10 +0100 Date: Mon, 23 Aug 2021 17:52:10 +0100 Message-ID: <871r6kqf2d.wl-maz@kernel.org> From: Marc Zyngier To: Pali =?UTF-8?B?Um9ow6Fy?= Cc: Lorenzo Pieralisi , Thomas Petazzoni , Bjorn Helgaas , Rob Herring , Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Marek =?UTF-8?B?QmVow7pu?= , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/3] PCI: aardvark: Fix reading MSI interrupt number In-Reply-To: <20210823164033.27491-2-pali@kernel.org> References: <20210815103624.19528-1-pali@kernel.org> <20210823164033.27491-1-pali@kernel.org> <20210823164033.27491-2-pali@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: pali@kernel.org, lorenzo.pieralisi@arm.com, thomas.petazzoni@bootlin.com, bhelgaas@google.com, robh@kernel.org, kw@linux.com, kabel@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 23 Aug 2021 17:40:31 +0100, Pali Rohár wrote: > > Experiments showed that in register PCIE_MSI_PAYLOAD_REG is stored number > of the last received MSI interrupt and not number of MSI interrupt which > belongs to msi_idx bit. Therefore this implies that aardvark HW can cache > only bits [4:0] of received MSI interrupts with effectively means that it > supports only MSI interrupts with numbers 0-31. > > Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt > number. Instead ensure that pci-aardvark.c configures only MSI numbers in > range 0-31 and then msi_idx contains correct received MSI number. > > Signed-off-by: Pali Rohár > Cc: stable@vger.kernel.org > --- > drivers/pci/controller/pci-aardvark.c | 11 +++-------- > 1 file changed, 3 insertions(+), 8 deletions(-) > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c > index 48fbfa7eb24c..81c4a9ff91a3 100644 > --- a/drivers/pci/controller/pci-aardvark.c > +++ b/drivers/pci/controller/pci-aardvark.c > @@ -1232,7 +1232,6 @@ static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie) > static void advk_pcie_handle_msi(struct advk_pcie *pcie) > { > u32 msi_val, msi_mask, msi_status, msi_idx; > - u16 msi_data; > int virq; > > msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); > @@ -1243,17 +1242,13 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) > if (!(BIT(msi_idx) & msi_status)) > continue; > > - /* > - * msi_idx contains bits [4:0] of the msi_data and msi_data > - * contains 16bit MSI interrupt number from MSI inner domain > - */ > advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); > - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK; > - virq = irq_find_mapping(pcie->msi_inner_domain, msi_data); > + > + virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx); > if (virq) > generic_handle_irq(virq); NAK. As I have explained before, I want this API dead, and I don't feel like doing another pass at the whole of the kernel tree to remove these patterns. A patch targeting stable is not a mandate for using deprecated APIs. You can always send another patch for stable versions before 5.14. M. -- Without deviation from the norm, progress is not possible.