From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4CCEC76191 for ; Mon, 15 Jul 2019 16:31:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 92C352081C for ; Mon, 15 Jul 2019 16:31:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731212AbfGOQbG (ORCPT ); Mon, 15 Jul 2019 12:31:06 -0400 Received: from mga12.intel.com ([192.55.52.136]:47500 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729533AbfGOQbG (ORCPT ); Mon, 15 Jul 2019 12:31:06 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Jul 2019 09:31:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,493,1557212400"; d="scan'208";a="167382269" Received: from tassilo.jf.intel.com (HELO tassilo.localdomain) ([10.7.201.137]) by fmsmga008.fm.intel.com with ESMTP; 15 Jul 2019 09:31:05 -0700 Received: by tassilo.localdomain (Postfix, from userid 1000) id D2E89301AE9; Mon, 15 Jul 2019 09:31:05 -0700 (PDT) From: Andi Kleen To: Uros Bizjak Cc: linux-kernel@vger.kernel.org, x86@kernel.org, Andrew Lutomirski , Thomas Gleixner Subject: Re: [RFC PATCH, x86]: Disable CPA cache flush for selfsnoop targets References: Date: Mon, 15 Jul 2019 09:31:05 -0700 In-Reply-To: (Uros Bizjak's message of "Thu, 11 Jul 2019 10:12:55 +0200") Message-ID: <8736j7gsza.fsf@linux.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Uros Bizjak writes: > Recent patch [1] disabled a self-snoop feature on a list of processor > models with a known errata, so we are confident that the feature > should work on remaining models also for other purposes than to speed > up MTRR programming. MTRR is very different than TLBs. >From my understanding not flushing with PAT is only safe everywhere when the memory is only used for coherent devices (like the Internal GPU on Intel CPUs). We don't have any infrastructure to track or enforce this unfortunately. -Andi