From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 498E8C432BE for ; Sun, 15 Aug 2021 09:27:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 30D4D6103A for ; Sun, 15 Aug 2021 09:27:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237450AbhHOJ2D (ORCPT ); Sun, 15 Aug 2021 05:28:03 -0400 Received: from mail.kernel.org ([198.145.29.99]:33598 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237332AbhHOJ2A (ORCPT ); Sun, 15 Aug 2021 05:28:00 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8E4B56103A; Sun, 15 Aug 2021 09:27:30 +0000 (UTC) Received: from 109-170-232-56.xdsl.murphx.net ([109.170.232.56] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mFCQS-0055fg-S6; Sun, 15 Aug 2021 10:27:29 +0100 Date: Sun, 15 Aug 2021 10:27:28 +0100 Message-ID: <874kbr12in.wl-maz@kernel.org> From: Marc Zyngier To: Florian Fainelli Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Will Deacon , Catalin Marinas , Mark Rutland , Ard Biesheuvel , bcm-kernel-feedback-list@broadcom.com, kernel-team@android.com Subject: Re: [PATCH 0/5] arm64: Survival kit for SCR_EL3.HCE==0 conditions In-Reply-To: <7ffa35bb-1f2c-19ff-fe4b-33267fba80e8@gmail.com> References: <20210812190213.2601506-1-maz@kernel.org> <7ffa35bb-1f2c-19ff-fe4b-33267fba80e8@gmail.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 109.170.232.56 X-SA-Exim-Rcpt-To: f.fainelli@gmail.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, zajec5@gmail.com, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, ardb@kernel.org, bcm-kernel-feedback-list@broadcom.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 15 Aug 2021 08:28:47 +0100, Florian Fainelli wrote: > > > > On 8/12/2021 9:02 PM, Marc Zyngier wrote: > > Anyone vaguely familiar with the ARMv8 architecture would quickly > > understand that entering the kernel at EL2 without enabling the HVC > > instruction is... living dangerously. But as it turns out [0], there > > is a whole range of (*cough*) "high quality" (*cough*) Broadcom > > systems out there configured exactly like that. > > Some Broadcom systems, namely the 4908 and all of those using CFE, > they later switched to u-boot and ATF and got it right. Do we have a list of the affected systems? > > > > > If you are speechless, I'm right with you. > > > > These machines have stopped being able to boot an upstream kernel > > since 5.12, where we changed the way we switch from nVHE to VHE, as > > this relies on the HVC instruction being usable... It is also worth > > noting that these systems have never been able to use KVM. Or kexec. > > > > This small series addresses the issue by detecting an UNDEFing HVC in > > a fairly controlled environment, and in this case pretend that we have > > booted at EL1. It also documents the requirement for SCR_EL3.HCE to be > > set to *1* if the kernel is entered at EL2. Turns out that we really > > have to state the obvious. > > > > This has been tested on a FVP model with a hacked-up boot-wrapper. > > > > Note that I really don't think any of this is -stable material, except > > maybe for the documentation. It isn't 5.14 material either. Best case, > > this is 5.15, or maybe even later. If ever. > > While I am very appreciative of the work you have done here to try to > get the dysfunctional systems to warn and continue to boot, I would > rather we try to load a minimal shim at EL3 capable of fixing up any > incorrect EL3 register setting ahead of loading the kernel provided > this is possible at all on a commercially available system. That would be the best thing to do, and would make the machine fully usable. I still think we need to have something in the kernel to at least let the user know that their system is misconfigured though. If CFE allows a payload to be loaded at EL3 and executed on all CPUs, that would be absolutely awesome. It would even allow switching over to ATF... Thanks, M. > Rafal, is this something that CFE allows you to do (as I could not > get a straight answer from that team), if so have you tried it? > -- > Florian > -- Without deviation from the norm, progress is not possible.