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From: Thomas Gleixner <tglx@linutronix.de>
To: Andy Lutomirski <luto@amacapital.net>
Cc: Brian Gerst <brgerst@gmail.com>,
	LKML <linux-kernel@vger.kernel.org>,
	the arch/x86 maintainers <x86@kernel.org>,
	Steven Rostedt <rostedt@goodmis.org>,
	Juergen Gross <JGross@suse.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Arnd Bergmann <arnd@arndb.de>
Subject: Re: [patch 01/15] x86/irq: Convey vector as argument and not in ptregs
Date: Thu, 27 Feb 2020 00:50:35 +0100	[thread overview]
Message-ID: <878skooqlw.fsf@nanos.tec.linutronix.de> (raw)
In-Reply-To: <0BF722CE-26CF-43AC-A2E4-5C4639794159@amacapital.net>

Andy Lutomirski <luto@amacapital.net> writes:
>> On Feb 26, 2020, at 12:13 PM, Thomas Gleixner <tglx@linutronix.de> wrote:
>> Brian Gerst <brgerst@gmail.com> writes:
>> Now the question is whether we care about the packed stubs or just make
>> them larger by using alignment to get rid of this silly +0x80 and
>> ~vector fixup later on. The straight forward thing clearly has its charm
>> and I doubt it matters in measurable ways.
>
> I agree it probably doesn’t matter. That being said, I have a distinct
> memory of fixing that asm so it would fail the build if the alignment
> was off.

Hrm. Doesn't look like. Gah, and I love the hardcoded  * 8 in the IDT
code. Let me add something to catch such things in the future.

Thanks,

        tglx


  reply	other threads:[~2020-02-26 23:50 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-25 22:47 [patch 00/15] x86/entry: Consolidation - Part V Thomas Gleixner
2020-02-25 22:47 ` [patch 01/15] x86/irq: Convey vector as argument and not in ptregs Thomas Gleixner
2020-02-26  5:13   ` Andy Lutomirski
2020-02-26  5:45   ` Brian Gerst
2020-02-26 20:13     ` Thomas Gleixner
2020-02-26 21:35       ` Andy Lutomirski
2020-02-26 23:50         ` Thomas Gleixner [this message]
2020-02-26 21:54       ` Brian Gerst
2020-02-26 23:43         ` Thomas Gleixner
2020-02-27  0:04           ` Brian Gerst
2020-02-25 22:47 ` [patch 02/15] x86/entry/64: Add ability to switch to IRQ stacks in idtentry Thomas Gleixner
2020-02-25 22:47 ` [patch 03/15] x86/entry: Add IRQENTRY_IRQ macro Thomas Gleixner
2020-02-26 15:05   ` Miroslav Benes
2020-02-25 22:47 ` [patch 04/15] x86/entry: Use idtentry for interrupts Thomas Gleixner
2020-02-25 22:47 ` [patch 05/15] x86/entry: Provide IDTEnTRY_SYSVEC Thomas Gleixner
2020-02-26  6:10   ` Andy Lutomirski
2020-02-26 20:15     ` Thomas Gleixner
2020-02-25 22:47 ` [patch 06/15] x86/entry: Convert APIC interrupts to IDTENTRY_SYSVEC Thomas Gleixner
2020-02-25 22:47 ` [patch 07/15] x86/entry: Convert SMP system vectors " Thomas Gleixner
2020-02-25 22:47 ` [patch 08/15] x86/entry: Convert various system vectors Thomas Gleixner
2020-02-25 22:47 ` [patch 09/15] x86/entry: Convert KVM vectors to IDTENTRY_SYSVEC Thomas Gleixner
2020-02-26 10:54   ` Paolo Bonzini
2020-02-25 22:47 ` [patch 10/15] x86/entry: Convert various hypervisor " Thomas Gleixner
2020-02-25 22:47 ` [patch 11/15] x86/entry: Convert XEN hypercall vector " Thomas Gleixner
2020-02-25 22:47 ` [patch 12/15] x86/entry: Remove the apic/BUILD interrupt leftovers Thomas Gleixner
2020-02-25 22:47 ` [patch 13/15] x86/entry/32: Remove redundant irq disable code Thomas Gleixner
2020-02-25 22:47 ` [patch 14/15] x86/entry: Provide return_from exception() Thomas Gleixner
2020-02-25 22:47 ` [patch 15/15] x86/entry: Use return_from_exception() Thomas Gleixner
2020-02-26  9:53 ` [patch 00/15] x86/entry: Consolidation - Part V Peter Zijlstra
2020-02-26 10:02   ` Peter Zijlstra

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