From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9088C43460 for ; Fri, 7 May 2021 10:25:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BB84A61460 for ; Fri, 7 May 2021 10:25:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236287AbhEGK0e convert rfc822-to-8bit (ORCPT ); Fri, 7 May 2021 06:26:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:46762 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234400AbhEGK0c (ORCPT ); Fri, 7 May 2021 06:26:32 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0F967613F0; Fri, 7 May 2021 10:25:33 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1lexfm-00BRW1-Md; Fri, 07 May 2021 11:25:30 +0100 Date: Fri, 07 May 2021 11:25:30 +0100 Message-ID: <87a6p6q1r9.wl-maz@kernel.org> From: Marc Zyngier To: Pali =?UTF-8?B?Um9ow6Fy?= Cc: Lorenzo Pieralisi , Thomas Petazzoni , Rob Herring , Bjorn Helgaas , Russell King , Marek =?UTF-8?B?QmVow7pu?= , Remi Pommarel , Xogium , Tomasz Maciej Nowak , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 19/42] PCI: aardvark: Fix setting MSI address In-Reply-To: <20210506153153.30454-20-pali@kernel.org> References: <20210506153153.30454-1-pali@kernel.org> <20210506153153.30454-20-pali@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: pali@kernel.org, lorenzo.pieralisi@arm.com, thomas.petazzoni@bootlin.com, robh@kernel.org, bhelgaas@google.com, rmk+kernel@armlinux.org.uk, kabel@kernel.org, repk@triplefau.lt, contact@xogium.me, tmn505@gmail.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 06 May 2021 16:31:30 +0100, Pali Rohár wrote: > > MSI address for receiving MSI interrupts needs to be correctly set before > enabling processing of MSI interrupts. > > Move code for setting PCIE_MSI_ADDR_LOW_REG and PCIE_MSI_ADDR_HIGH_REG > registers with MSI address from advk_pcie_init_msi_irq_domain() function to > advk_pcie_setup_hw() function before enabling PCIE_CORE_CTRL2_MSI_ENABLE. > > As part of this change, also remove unused variable msi_msg, which was used > only for MSI doorbell address. MSI address can be any address which does > not conflict with PCI space. Not quite. It can be any address that cannot be used to *DMA* to. > So change it to the address of the main struct advk_pcie. > > Signed-off-by: Pali Rohár > Reviewed-by: Marek Behún > Cc: stable@vger.kernel.org # f21a8b1b6837 ("PCI: aardvark: Move to MSI handling using generic MSI support") > --- > drivers/pci/controller/pci-aardvark.c | 21 +++++++++------------ > 1 file changed, 9 insertions(+), 12 deletions(-) > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c > index 5e0243b2c473..199015215779 100644 > --- a/drivers/pci/controller/pci-aardvark.c > +++ b/drivers/pci/controller/pci-aardvark.c > @@ -195,7 +195,6 @@ struct advk_pcie { > struct msi_domain_info msi_domain_info; > DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); > struct mutex msi_used_lock; > - u16 msi_msg; > int link_gen; > struct pci_bridge_emul bridge; > struct gpio_desc *reset_gpio; > @@ -325,6 +324,7 @@ static void advk_pcie_train_link(struct advk_pcie *pcie) > > static void advk_pcie_setup_hw(struct advk_pcie *pcie) > { > + phys_addr_t msi_addr; > u32 reg; > > /* Enable TX */ > @@ -381,6 +381,11 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) > reg |= LANE_COUNT_1; > advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); > > + /* Set MSI address */ > + msi_addr = virt_to_phys(pcie); > + advk_writel(pcie, lower_32_bits(msi_addr), PCIE_MSI_ADDR_LOW_REG); > + advk_writel(pcie, upper_32_bits(msi_addr), PCIE_MSI_ADDR_HIGH_REG); > + > /* Enable MSI */ > reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); > reg |= PCIE_CORE_CTRL2_MSI_ENABLE; > @@ -862,10 +867,10 @@ static void advk_msi_irq_compose_msi_msg(struct irq_data *data, > struct msi_msg *msg) > { > struct advk_pcie *pcie = irq_data_get_irq_chip_data(data); > - phys_addr_t msi_msg = virt_to_phys(&pcie->msi_msg); > + phys_addr_t msi_addr = virt_to_phys(pcie); > > - msg->address_lo = lower_32_bits(msi_msg); > - msg->address_hi = upper_32_bits(msi_msg); > + msg->address_lo = lower_32_bits(msi_addr); > + msg->address_hi = upper_32_bits(msi_addr); > msg->data = data->hwirq; > } > > @@ -960,7 +965,6 @@ static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) > struct device_node *node = dev->of_node; > struct irq_chip *bottom_ic, *msi_ic; > struct msi_domain_info *msi_di; > - phys_addr_t msi_msg_phys; > > mutex_init(&pcie->msi_used_lock); > > @@ -978,13 +982,6 @@ static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) > MSI_FLAG_MULTI_PCI_MSI; > msi_di->chip = msi_ic; > > - msi_msg_phys = virt_to_phys(&pcie->msi_msg); > - > - advk_writel(pcie, lower_32_bits(msi_msg_phys), > - PCIE_MSI_ADDR_LOW_REG); > - advk_writel(pcie, upper_32_bits(msi_msg_phys), > - PCIE_MSI_ADDR_HIGH_REG); > - > pcie->msi_inner_domain = > irq_domain_add_linear(NULL, MSI_IRQ_NUM, > &advk_msi_domain_ops, pcie); Otherwise, Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.