From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D382C433E0 for ; Fri, 19 Feb 2021 18:12:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5866264E5F for ; Fri, 19 Feb 2021 18:12:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229913AbhBSSLp (ORCPT ); Fri, 19 Feb 2021 13:11:45 -0500 Received: from mail.kernel.org ([198.145.29.99]:43706 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229607AbhBSSLm (ORCPT ); Fri, 19 Feb 2021 13:11:42 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3CA1164E44; Fri, 19 Feb 2021 18:11:01 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lDAF1-00EydH-0E; Fri, 19 Feb 2021 18:10:59 +0000 Date: Fri, 19 Feb 2021 18:10:56 +0000 Message-ID: <87a6s0orm7.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, marcan@marcan.st, tglx@linutronix.de, will@kernel.org Subject: Re: [PATCH 0/8] arm64: Support FIQ controller registration In-Reply-To: <20210219113904.41736-1-mark.rutland@arm.com> References: <20210219113904.41736-1-mark.rutland@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, marcan@marcan.st, tglx@linutronix.de, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mark, On Fri, 19 Feb 2021 11:38:56 +0000, Mark Rutland wrote: > > Hector's M1 support series [1] shows that some platforms have critical > interrupts wired to FIQ, and to support these platforms we need to support > handling FIQ exceptions. Other contemporary platforms don't use FIQ (since e.g. > this is usually routed to EL3), and as we never expect to take an FIQ, we have > the FIQ vector cause a panic. > > Since the use of FIQ is a platform integration detail (which can differ across > bare-metal and virtualized environments), we need be able to explicitly opt-in > to handling FIQs while retaining the existing behaviour otherwise. This series > adds a new set_handle_fiq() hook so that the FIQ controller can do so, and > where no controller is registered the default handler will panic(). For > consistency the set_handle_irq() code is made to do the same. > > The first couple of patches are from Marc's irq/drop-generic_irq_multi_handler > branch [2] on kernel.org, and clean up CONFIG_GENERIC_IRQ_MULTI_HANDLER usage. > The next four patches move arm64 over to a local set_handle_irq() > implementation, which is written to share code with a set_handle_fiq() function > in the last two patches. The only functional difference here is that if an IRQ > is somehow taken prior to set_handle_irq() the default handler will directly > panic() rather than the vector branching to NULL. > > The penultimate patch is cherry-picked from the v2 M1 series, and as per > discussion there [3] will need a few additional fixups. I've included it for > now as the DAIF.IF alignment is necessary for the FIQ exception handling added > in the final patch. > > The final patch adds the low-level FIQ exception handling and registration > mechanism atop the prior rework. Thanks for putting this together. I have an extra patch on top of this series[1] that prevents the kernel from catching fire if a FIQ fires whilst running a guest. Nothing urgent, we can queue it at a later time. Thanks, M. [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/fiq -- Without deviation from the norm, progress is not possible.