From: Kalle Valo <kvalo@codeaurora.org>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>, "H Peter Anvin" <hpa@zytor.com>,
"Dave Hansen" <dave.hansen@intel.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Ashok Raj" <ashok.raj@intel.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Xiaoyao Li " <xiaoyao.li@intel.com>,
"Michael Chan" <michael.chan@broadcom.com>,
"Ravi V Shankar" <ravi.v.shankar@intel.com>,
"linux-kernel" <linux-kernel@vger.kernel.org>,
"x86" <x86@kernel.org>,
linux-wireless@vger.kernel.org, netdev@vger.kernel.org,
kvm@vger.kernel.org
Subject: Re: [PATCH v5 03/18] wlcore: simplify/fix/optimize reg_ch_conf_pending operations
Date: Thu, 14 Mar 2019 15:16:33 +0200 [thread overview]
Message-ID: <87a7hxzjda.fsf@purkki.adurom.net> (raw)
In-Reply-To: <1552431636-31511-4-git-send-email-fenghua.yu@intel.com> (Fenghua Yu's message of "Tue, 12 Mar 2019 16:00:21 -0700")
Fenghua Yu <fenghua.yu@intel.com> writes:
> From: Paolo Bonzini <pbonzini@redhat.com>
>
> Bitmaps are defined on unsigned longs, so the usage of u32[2] in the
> wlcore driver is incorrect. As noted by Peter Zijlstra, casting arrays
> to a bitmap is incorrect for big-endian architectures.
>
> When looking at it I observed that:
>
> - operations on reg_ch_conf_pending is always under the wl_lock mutex,
> so set_bit is overkill
>
> - the only case where reg_ch_conf_pending is accessed a u32 at a time is
> unnecessary too.
>
> This patch cleans up everything in this area, and changes tmp_ch_bitmap
> to have the proper alignment.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
[...]
> int wlcore_cmd_regdomain_config_locked(struct wl1271 *wl)
> {
> struct wl12xx_cmd_regdomain_dfs_config *cmd = NULL;
> int ret = 0, i, b, ch_bit_idx;
> - u32 tmp_ch_bitmap[2];
> + u32 tmp_ch_bitmap[2] __aligned(sizeof(unsigned long));
> struct wiphy *wiphy = wl->hw->wiphy;
> struct ieee80211_supported_band *band;
> bool timeout = false;
[...]
> @@ -1754,8 +1751,8 @@ int wlcore_cmd_regdomain_config_locked(struct wl1271 *wl)
> goto out;
> }
>
> - cmd->ch_bit_map1 = cpu_to_le32(tmp_ch_bitmap[0]);
> - cmd->ch_bit_map2 = cpu_to_le32(tmp_ch_bitmap[1]);
> + cmd->ch_bit_map1 = tmp_ch_bitmap[0];
> + cmd->ch_bit_map2 = tmp_ch_bitmap[1];
Will sparse still be happy? AFAICS you are now assigning u32 to __le32:
struct wl12xx_cmd_regdomain_dfs_config {
struct wl1271_cmd_header header;
__le32 ch_bit_map1;
__le32 ch_bit_map2;
Also this doesn't depend on anything else from this patchset, right? So
I could apply this directly?
--
Kalle Valo
next prev parent reply other threads:[~2019-03-14 13:16 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-12 23:00 [PATCH v5 00/18] x86/split_lock: Enable #AC exception for split locked accesses Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 01/18] x86/common: Align cpu_caps_cleared and cpu_caps_set to unsigned long Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 02/18] drivers/net/b44: Align pwol_mask to unsigned long for better performance Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 03/18] wlcore: simplify/fix/optimize reg_ch_conf_pending operations Fenghua Yu
2019-03-14 13:16 ` Kalle Valo [this message]
2019-03-14 23:16 ` Fenghua Yu
2019-03-15 17:17 ` Paolo Bonzini
2019-03-26 7:55 ` Kalle Valo
2019-03-12 23:00 ` [PATCH v5 04/18] x86/split_lock: Align x86_capability to unsigned long to avoid split locked access Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 05/18] x86/cpufeatures: Enumerate IA32_CORE_CAPABILITIES MSR Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 06/18] x86/msr-index: Define IA32_CORE_CAPABILITY MSR and #AC exception for split lock bit Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 07/18] x86/split_lock: Enumerate #AC for split lock by MSR IA32_CORE_CAPABILITY Fenghua Yu
2019-03-12 23:52 ` Dave Hansen
2019-03-13 0:56 ` Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 08/18] x86/split_lock: Define MSR TEST_CTL register Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 09/18] x86/split_lock: Handle #AC exception for split lock Fenghua Yu
2019-03-12 23:51 ` Dave Hansen
2019-03-13 0:49 ` Fenghua Yu
2019-03-13 16:22 ` Dave Hansen
2019-03-12 23:00 ` [PATCH v5 10/18] kvm/x86: Emulate MSR IA32_CORE_CAPABILITY Fenghua Yu
2019-03-13 8:15 ` Paolo Bonzini
2019-03-12 23:00 ` [PATCH v5 11/18] kvm/vmx: Emulate MSR TEST_CTL Fenghua Yu
2019-03-13 8:15 ` Paolo Bonzini
2019-03-12 23:00 ` [PATCH v5 12/18] x86/split_lock: Enable #AC for split lock by default Fenghua Yu
2019-03-12 23:43 ` Dave Hansen
2019-03-12 23:00 ` [PATCH v5 13/18] x86/split_lock: Add a sysfs interface to allow user to enable or disable split lock detection on all CPUs during run time Fenghua Yu
2019-03-12 23:48 ` Dave Hansen
2019-03-13 0:53 ` Fenghua Yu
2019-03-13 1:08 ` Dave Hansen
2019-03-12 23:00 ` [PATCH v5 14/18] x86/clearcpuid: Support multiple clearcpuid options Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 15/18] x86/clearcpuid: Support feature flag string in kernel option clearcpuid Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 16/18] x86/clearcpuid: Apply cleared feature bits that are forced set before Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 17/18] x86/clearcpuid: Clear CPUID bit in CPUID faulting Fenghua Yu
2019-03-12 23:00 ` [PATCH v5 18/18] Change document for kernel option clearcpuid Fenghua Yu
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