On 11/16/2020 3:37 PM, Mark Tomlinson wrote: > When setting a GPIO pin to an output, it is important to set the value > correctly before enabling the output so that a glitch is not seen on the > pin. This glitch may be very short, but can be important if this is a > reset signal. > > Fixes: 8bfcbbbcabe0 ("pinctrl: nsp: add gpio-a driver support for Broadcom NSP SoC") > Signed-off-by: Mark Tomlinson > --- > drivers/pinctrl/bcm/pinctrl-nsp-gpio.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c > index a00a42a61a90..942f04ca4868 100644 > --- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c > +++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c > @@ -289,8 +289,8 @@ static int nsp_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, > unsigned long flags; > > raw_spin_lock_irqsave(&chip->lock, flags); > - nsp_set_bit(chip, REG, NSP_GPIO_OUT_EN, gpio, true); > nsp_set_bit(chip, REG, NSP_GPIO_DATA_OUT, gpio, !!(val)); > + nsp_set_bit(chip, REG, NSP_GPIO_OUT_EN, gpio, true); > raw_spin_unlock_irqrestore(&chip->lock, flags); > > dev_dbg(chip->dev, "gpio:%u set output, value:%d\n", gpio, val); > The fix looks good to me. Thanks! Acked-by: Ray Jui