From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40257C64E8A for ; Thu, 3 Dec 2020 10:13:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DA2B021527 for ; Thu, 3 Dec 2020 10:13:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729086AbgLCKNl (ORCPT ); Thu, 3 Dec 2020 05:13:41 -0500 Received: from mo-csw1514.securemx.jp ([210.130.202.153]:55990 "EHLO mo-csw.securemx.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726082AbgLCKNk (ORCPT ); Thu, 3 Dec 2020 05:13:40 -0500 Received: by mo-csw.securemx.jp (mx-mo-csw1514) id 0B3ABGG3016292; Thu, 3 Dec 2020 19:11:16 +0900 X-Iguazu-Qid: 34tru22SmdemqdXay2 X-Iguazu-QSIG: v=2; s=0; t=1606990276; q=34tru22SmdemqdXay2; m=f0hXoQvS86BDq/vavYVZYk2qxHssrnbqfH2Zb9fuC/E= Received: from imx12.toshiba.co.jp (imx12.toshiba.co.jp [61.202.160.132]) by relay.securemx.jp (mx-mr1512) id 0B3ABFUG008832; Thu, 3 Dec 2020 19:11:15 +0900 Received: from enc02.toshiba.co.jp ([61.202.160.51]) by imx12.toshiba.co.jp with ESMTP id 0B3ABFHF027783; Thu, 3 Dec 2020 19:11:15 +0900 (JST) Received: from hop101.toshiba.co.jp ([133.199.85.107]) by enc02.toshiba.co.jp with ESMTP id 0B3ABFMe021632; Thu, 3 Dec 2020 19:11:15 +0900 From: Punit Agrawal To: Nobuhiro Iwamatsu Cc: Rob Herring , Linus Walleij , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 4/4] arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver References: <20201201181406.2371881-1-nobuhiro1.iwamatsu@toshiba.co.jp> <20201201181406.2371881-5-nobuhiro1.iwamatsu@toshiba.co.jp> Date: Thu, 03 Dec 2020 19:11:13 +0900 In-Reply-To: <20201201181406.2371881-5-nobuhiro1.iwamatsu@toshiba.co.jp> (Nobuhiro Iwamatsu's message of "Wed, 2 Dec 2020 03:14:06 +0900") X-TSB-HOP: ON Message-ID: <87eek742ta.fsf@kokedama.swc.toshiba.co.jp> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Nobuhiro Iwamatsu writes: > Add the GPIO node in Toshiba Visconti5 SoC-specific DT file. > And enable the GPIO node in TMPV7708 RM main board's board-specific DT file. > > Signed-off-by: Nobuhiro Iwamatsu > --- > .../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 4 +++ > arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 27 +++++++++++++++++++ > 2 files changed, 31 insertions(+) > > diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > index ed0bf7f13f54..950010a290f0 100644 > --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > @@ -41,3 +41,7 @@ &uart1 { > clocks = <&uart_clk>; > clock-names = "apb_pclk"; > }; > + > +&gpio { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi > index 242f25f4e12a..ac9bddb35b0a 100644 > --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi > +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi > @@ -157,6 +157,33 @@ pmux: pmux@24190000 { > reg = <0 0x24190000 0 0x10000>; > }; > > + gpio: gpio@28020000 { > + compatible = "toshiba,gpio-tmpv7708"; > + reg = <0 0x28020000 0 0x1000>; > + #gpio-cells = <0x2>; > + gpio-ranges = <&pmux 0 0 32>; > + gpio-controller; > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupts = > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + }; > + > uart0: serial@28200000 { > compatible = "arm,pl011", "arm,primecell"; > reg = <0 0x28200000 0 0x1000>; FWIW, Reviewed-by: Punit Agrawal Thanks, Punit