From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32C8AC43460 for ; Mon, 26 Apr 2021 14:02:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F25736101B for ; Mon, 26 Apr 2021 14:02:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233774AbhDZODJ (ORCPT ); Mon, 26 Apr 2021 10:03:09 -0400 Received: from mga12.intel.com ([192.55.52.136]:60366 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233753AbhDZODF (ORCPT ); Mon, 26 Apr 2021 10:03:05 -0400 IronPort-SDR: 6GBifomqsSvYWlBcCm54qTbZunpuKQv9MWgWAbVJrB6+z4E2BvEMRwuKch5Bpi6HxEKbZ1h7nx l9E805uGWZAA== X-IronPort-AV: E=McAfee;i="6200,9189,9966"; a="175821456" X-IronPort-AV: E=Sophos;i="5.82,252,1613462400"; d="scan'208";a="175821456" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2021 07:02:24 -0700 IronPort-SDR: s7oyIgZqBjdjZo0+7BlmBmM9LWUjSS+7z47GV0wkE5zh63dppdouTE+mfg0im3BNK2KxNOpuVa dCGxZnqOoBjQ== X-IronPort-AV: E=Sophos;i="5.82,252,1613462400"; d="scan'208";a="429407654" Received: from unknown (HELO localhost) ([10.252.50.197]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2021 07:02:21 -0700 From: Jani Nikula To: zuoqilin1@163.com, airlied@linux.ie, daniel@ffwll.ch Cc: zuoqilin , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: Re: [PATCH] display: Fix typo issue In-Reply-To: <20210317074228.1147-1-zuoqilin1@163.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210317074228.1147-1-zuoqilin1@163.com> Date: Mon, 26 Apr 2021 17:02:17 +0300 Message-ID: <87fszd5el2.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 17 Mar 2021, zuoqilin1@163.com wrote: > From: zuoqilin > > Change 'befor' to 'before'. > > Signed-off-by: zuoqilin Thanks, pushed, sorry for the delay. BR, Jani. > --- > drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c > index f94025e..45187ff 100644 > --- a/drivers/gpu/drm/i915/display/vlv_dsi.c > +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c > @@ -846,7 +846,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, > intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP); > > /* Enable port in pre-enable phase itself because as per hw team > - * recommendation, port should be enabled befor plane & pipe */ > + * recommendation, port should be enabled before plane & pipe */ > if (is_cmd_mode(intel_dsi)) { > for_each_dsi_port(port, intel_dsi->ports) > intel_de_write(dev_priv, -- Jani Nikula, Intel Open Source Graphics Center