From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E632C4338F for ; Fri, 13 Aug 2021 17:33:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EAF94610A4 for ; Fri, 13 Aug 2021 17:33:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232353AbhHMReU convert rfc822-to-8bit (ORCPT ); Fri, 13 Aug 2021 13:34:20 -0400 Received: from mail.kernel.org ([198.145.29.99]:40910 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229944AbhHMReT (ORCPT ); Fri, 13 Aug 2021 13:34:19 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2D71761038; Fri, 13 Aug 2021 17:33:52 +0000 (UTC) Received: from 109-170-232-56.xdsl.murphx.net ([109.170.232.56] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mEb41-004qYd-UR; Fri, 13 Aug 2021 18:33:50 +0100 Date: Fri, 13 Aug 2021 18:33:58 +0100 Message-ID: <87k0kp1c6x.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Catalin Marinas , Mark Rutland , Ard Biesheuvel , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, kernel-team@android.com Subject: Re: [PATCH 3/5] arm64: Detect disabled HVC early In-Reply-To: <20210813090539.GA7536@willie-the-truck> References: <20210812190213.2601506-1-maz@kernel.org> <20210812190213.2601506-4-maz@kernel.org> <20210813090539.GA7536@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-SA-Exim-Connect-IP: 109.170.232.56 X-SA-Exim-Rcpt-To: will@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, zajec5@gmail.com, catalin.marinas@arm.com, mark.rutland@arm.com, ardb@kernel.org, f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 13 Aug 2021 10:05:40 +0100, Will Deacon wrote: > > On Thu, Aug 12, 2021 at 08:02:11PM +0100, Marc Zyngier wrote: > > Having HVC disabled from EL3 while the kernel is entered at EL2 > > is a complete nightmare. > > > > We end-up taking an UNDEF at the worse possible moment (checking > > for VHE) and even if we didn't, having KVM enabled would signify > > the premature end of the kernel. > > > > Instead, try and detect this stupid case by issuing a HVC > > for HVC_RESET_VECTORS, which does nothing when the stubs > > are live. If we get HVC_STUB_ERR back, that's because the > > UNDEF handler has kicked in. > > > > In this situation, close your eyes, block your nose, and gracefully > > pretend we have booted at EL1. > > > > Reported-by: Rafał Miłecki > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kernel/head.S | 22 ++++++++++++++++++++++ > > 1 file changed, 22 insertions(+) > > > > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > > index 9d5aa56a98cc..d6b2b05f5d3a 100644 > > --- a/arch/arm64/kernel/head.S > > +++ b/arch/arm64/kernel/head.S > > @@ -519,6 +519,28 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) > > msr vbar_el2, x0 > > isb > > > > + // Check that HVC actually works... > > + mov x0, #HVC_RESET_VECTORS > > + hvc #0 > > + > > + mov_q x1, HVC_STUB_ERR > > + cmp x0, x1 > > + b.ne 0f > > + > > + /* > > + * HVC is unusable, so pretend we actually booted at EL1. > > + * Once we have left EL2, there will be no going back. > > + */ > > This comment got me thinking... > > .macro host_hvc0 > mrs xzr, actlr_el1 > .endm > > then set HCR_EL2.TACR=1 while we still can and match the ISS against a > constant in the handler. Too awful? I had a similar idea, using an ID register instead (though ACTLR_EL1 is much neater). It would indeed allow the kernel to go back to EL2. But for what purpose? Yes, we could enable KVM that way. However, the guest would need to know about it as well, as even simple things like PSCI wouldn't work. That's would be defining a new guest ABI, and I'm not overly keen on it. Unless you are thinking of something else? Thanks, M. -- Without deviation from the norm, progress is not possible.