From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: Yanan Wang <wangyanan55@huawei.com>,
Quentin Perret <qperret@google.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Gavin Shan <gshan@redhat.com>,
wanghaibin.wang@huawei.com, zhukeqian1@huawei.com,
yuzenghui@huawei.com
Subject: Re: [PATCH v7 4/4] KVM: arm64: Move guest CMOs to the fault handlers
Date: Thu, 17 Jun 2021 13:59:37 +0100 [thread overview]
Message-ID: <87k0msd4ue.wl-maz@kernel.org> (raw)
In-Reply-To: <20210617124557.GB24457@willie-the-truck>
On Thu, 17 Jun 2021 13:45:57 +0100,
Will Deacon <will@kernel.org> wrote:
>
> On Thu, Jun 17, 2021 at 06:58:24PM +0800, Yanan Wang wrote:
> > We currently uniformly permorm CMOs of D-cache and I-cache in function
> > user_mem_abort before calling the fault handlers. If we get concurrent
> > guest faults(e.g. translation faults, permission faults) or some really
> > unnecessary guest faults caused by BBM, CMOs for the first vcpu are
> > necessary while the others later are not.
> >
> > By moving CMOs to the fault handlers, we can easily identify conditions
> > where they are really needed and avoid the unnecessary ones. As it's a
> > time consuming process to perform CMOs especially when flushing a block
> > range, so this solution reduces much load of kvm and improve efficiency
> > of the stage-2 page table code.
> >
> > We can imagine two specific scenarios which will gain much benefit:
> > 1) In a normal VM startup, this solution will improve the efficiency of
> > handling guest page faults incurred by vCPUs, when initially populating
> > stage-2 page tables.
> > 2) After live migration, the heavy workload will be resumed on the
> > destination VM, however all the stage-2 page tables need to be rebuilt
> > at the moment. So this solution will ease the performance drop during
> > resuming stage.
> >
> > Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
> > ---
> > arch/arm64/kvm/hyp/pgtable.c | 38 +++++++++++++++++++++++++++++-------
> > arch/arm64/kvm/mmu.c | 37 ++++++++++++++---------------------
> > 2 files changed, 46 insertions(+), 29 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > index d99789432b05..760c551f61da 100644
> > --- a/arch/arm64/kvm/hyp/pgtable.c
> > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > @@ -577,12 +577,24 @@ static void stage2_put_pte(kvm_pte_t *ptep, struct kvm_s2_mmu *mmu, u64 addr,
> > mm_ops->put_page(ptep);
> > }
> >
> > +static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte)
> > +{
> > + u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR;
> > + return memattr == KVM_S2_MEMATTR(pgt, NORMAL);
> > +}
> > +
> > +static bool stage2_pte_executable(kvm_pte_t pte)
> > +{
> > + return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN);
> > +}
> > +
> > static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level,
> > kvm_pte_t *ptep,
> > struct stage2_map_data *data)
> > {
> > kvm_pte_t new, old = *ptep;
> > u64 granule = kvm_granule_size(level), phys = data->phys;
> > + struct kvm_pgtable *pgt = data->mmu->pgt;
> > struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops;
> >
> > if (!kvm_block_mapping_supported(addr, end, phys, level))
> > @@ -606,6 +618,14 @@ static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level,
> > stage2_put_pte(ptep, data->mmu, addr, level, mm_ops);
> > }
> >
> > + /* Perform CMOs before installation of the guest stage-2 PTE */
> > + if (mm_ops->clean_invalidate_dcache && stage2_pte_cacheable(pgt, new))
> > + mm_ops->clean_invalidate_dcache(kvm_pte_follow(new, mm_ops),
> > + granule);
> > +
> > + if (mm_ops->invalidate_icache && stage2_pte_executable(new))
> > + mm_ops->invalidate_icache(kvm_pte_follow(new, mm_ops), granule);
>
> One thing I'm missing here is why we need the indirection via mm_ops. Are
> there cases where we would want to pass a different function pointer for
> invalidating the icache? If not, why not just call the function directly?
>
> Same for the D side.
If we didn't do that, we'd end-up having to track whether the guest
context requires CMOs with additional flags, which is pretty ugly (see
v5 of this series for reference [1]).
It also means that we would have to drag the CM functions into the EL2
object, something that we don't need with this approach.
M.
[1] https://lore.kernel.org/r/20210415115032.35760-1-wangyanan55@huawei.com
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-06-17 12:59 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-17 10:58 [PATCH v7 0/4] KVM: arm64: Improve efficiency of stage2 page table Yanan Wang
2021-06-17 10:58 ` [PATCH v7 1/4] KVM: arm64: Introduce two cache maintenance callbacks Yanan Wang
2021-06-17 12:38 ` Will Deacon
2021-06-17 14:20 ` Marc Zyngier
2021-06-18 1:52 ` wangyanan (Y)
2021-06-18 8:59 ` Fuad Tabba
2021-06-18 11:10 ` Marc Zyngier
2021-06-17 10:58 ` [PATCH v7 2/4] KVM: arm64: Introduce mm_ops member for structure stage2_attr_data Yanan Wang
2021-06-18 9:29 ` Fuad Tabba
2021-06-17 10:58 ` [PATCH v7 3/4] KVM: arm64: Tweak parameters of guest cache maintenance functions Yanan Wang
2021-06-18 9:29 ` Fuad Tabba
[not found] ` <87czsjcsv8.wl-maz@kernel.org>
2021-06-18 13:14 ` wangyanan (Y)
2021-06-17 10:58 ` [PATCH v7 4/4] KVM: arm64: Move guest CMOs to the fault handlers Yanan Wang
2021-06-17 12:45 ` Will Deacon
2021-06-17 12:59 ` Marc Zyngier [this message]
2021-06-17 13:21 ` Will Deacon
2021-06-17 13:37 ` Marc Zyngier
2021-06-18 9:30 ` Fuad Tabba
2021-06-18 11:38 ` [PATCH v7 0/4] KVM: arm64: Improve efficiency of stage2 page table Marc Zyngier
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