From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FD6DC388F9 for ; Thu, 12 Nov 2020 01:32:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3DFCD20809 for ; Thu, 12 Nov 2020 01:32:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Yz4kBo6i"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="0e9+v4yP" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727820AbgKLBc5 (ORCPT ); Wed, 11 Nov 2020 20:32:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727054AbgKKWqp (ORCPT ); Wed, 11 Nov 2020 17:46:45 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50E12C061A04; Wed, 11 Nov 2020 14:27:30 -0800 (PST) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1605133648; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=/AJjHM4RdDlSJrBc4hxI1WObRemgRGA65few9eI9qhY=; b=Yz4kBo6iYpJ8A4VQHynSbh4zW33QX2TNKzEpF1vlJPbmL+ZOD/van513qYoQjUoLfiANkU /UcMuwr8ewQcOHJeACUHCPyaL/pQoU2Ye8qx5txQ5T1oPPOkUX8vJvzXHi6g0kwY67Itxa zGBFaWBV6dWK7StOKa/6l5Nbqbq4uAESoYqm4i6BqxlZlwB+jx6IrPz3+6zW+VvZltQnya H6MVzg9fXch2mIZ35bjtmv0EZ7F+FreuENigEmTzM8YVaGUms1dhyAjDYnVCbB2zUPKVcn mhXkmwtjeC83I8oiQUHByMZkWQELU+8MltibUfrWk7rdaAe3ViEru5/B5/33mA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1605133648; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=/AJjHM4RdDlSJrBc4hxI1WObRemgRGA65few9eI9qhY=; b=0e9+v4yPq7Pamk3s9B1ZMn8Y1Q6geVARcMOWJtapXhxL5QALz7ZL4IJuvemVn9hGu0f1QI Xasc43FTcv++sKCQ== To: "Raj\, Ashok" , Christoph Hellwig Cc: David Woodhouse , Jason Gunthorpe , Dan Williams , "Tian\, Kevin" , "Jiang\, Dave" , Bjorn Helgaas , "vkoul\@kernel.org" , "Dey\, Megha" , "maz\@kernel.org" , "bhelgaas\@google.com" , "alex.williamson\@redhat.com" , "Pan\, Jacob jun" , "Liu\, Yi L" , "Lu\, Baolu" , "Kumar\, Sanjay K" , "Luck\, Tony" , "jing.lin\@intel.com" , "kwankhede\@nvidia.com" , "eric.auger\@redhat.com" , "parav\@mellanox.com" , "rafael\@kernel.org" , "netanelg\@mellanox.com" , "shahafs\@mellanox.com" , "yan.y.zhao\@linux.intel.com" , "pbonzini\@redhat.com" , "Ortiz\, Samuel" , "Hossain\, Mona" , "dmaengine\@vger.kernel.org" , "linux-kernel\@vger.kernel.org" , "linux-pci\@vger.kernel.org" , "kvm\@vger.kernel.org" , Ashok Raj Subject: Re: [PATCH v4 06/17] PCI: add SIOV and IMS capability detection In-Reply-To: <20201111160922.GA83266@otc-nc-03> References: <20201104135415.GX2620339@nvidia.com> <20201106131415.GT2620339@nvidia.com> <20201106164850.GA85879@otc-nc-03> <20201106175131.GW2620339@nvidia.com> <20201107001207.GA2620339@nvidia.com> <87pn4nk7nn.fsf@nanos.tec.linutronix.de> <20201111154159.GA24059@infradead.org> <20201111160922.GA83266@otc-nc-03> Date: Wed, 11 Nov 2020 23:27:28 +0100 Message-ID: <87k0uro7fz.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 11 2020 at 08:09, Ashok Raj wrote: > On Wed, Nov 11, 2020 at 03:41:59PM +0000, Christoph Hellwig wrote: >> On Sun, Nov 08, 2020 at 07:36:34PM +0000, David Woodhouse wrote: >> > So it does look like we're going to need a hypercall interface to >> > compose an MSI message on behalf of the guest, for IMS to use. In fact >> > PCI devices assigned to a guest could use that too, and then we'd only >> > need to trap-and-remap any attempt to write a Compatibility Format MSI >> > to the device's MSI table, while letting Remappable Format messages get >> > written directly. >> > >> > We'd also need a way for an OS running on bare metal to *know* that >> > it's on bare metal and can just compose MSI messages for itself. Since >> > we do expect bare metal to have an IOMMU, perhaps that is just a >> > feature flag on the IOMMU? >> >> Have the platform firmware advertise if it needs native or virtualized >> IMS handling. If it advertises neither don't support IMS? > > The platform hint can be easily accomplished via DMAR table flags. We could > have an IMS_OPTOUT(similart to x2apic optout flag) flag, when 0 its native > and IMS is supported. > > When vIOMMU is presented to guest, virtual DMAR table will have this flag > set to 1. Indicates to GuestOS, native IMS isn't supported. These opt-out bits suck by definition. It comes all back to the fact that the whole virt thing didn't have a hardware defined way to tell that the OS runs in a VM and not on bare metal. It wouldn't have been rocket science to do so. And because that does not exist, we need magic opt-out bits for every other piece of functionality which gets added. Can we please stop this and provide a well defined way to tell the OS whether it runs on bare metal or not? The point is that you really want opt-in bits so that decisions come down to if (!virt || virt->supports_X) which is the obvious sane and safe logic. But sure, why am I asking for sane and safe in the context of virtualization? Thanks, tglx