From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0E65C4708D for ; Fri, 28 May 2021 08:23:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D3190613E3 for ; Fri, 28 May 2021 08:23:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236320AbhE1IZT (ORCPT ); Fri, 28 May 2021 04:25:19 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:39762 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236259AbhE1IZR (ORCPT ); Fri, 28 May 2021 04:25:17 -0400 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1622190222; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=r27x5A/mW+JUIMBZzc/wmBulGC3zrTBxzCsoY6/3r4s=; b=CaizHuOU50Ys7mkc1GyyEVbbf60RsyWIDyNbQe7eXw0sa+wc8YVmxZ/f21vO7RAWT7+223 zzugY05kdl1ajE6vFCZA6UJPZ5X4p6ApBurz3SdC3UT7LNEq9u5WhDnHkJz6j8nzWo57XH HMN4OL5NRxZTCGeyfPymCa8qYBGJlJwycYPAoDz9Dgk9U6LT5W9AqAHOv1PnAvhU3iITLV fLBioZw0tXrrwL4T4ZJLcQzlnXgzCmZ92JI4xYwo6l9c2rylo9OMZ4jy7FYQjeXn4jeHP8 lwaoVKS80g9bxWlLWiU7SXCElO0V2UG0+oN8CW4NpT3KBRz9wFQcgDRjqFxNwg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1622190222; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=r27x5A/mW+JUIMBZzc/wmBulGC3zrTBxzCsoY6/3r4s=; b=yf4HRnTXpK4A8KWpLlZZImWwfkRaK+/mXlcyKIqd6s+sH37cH+f9x81fe9fWswy+ufmka9 zl+mJ+5+rDvYGdBQ== To: Borislav Petkov Cc: Borislav Petkov , James Feeney , linux-smp@vger.kernel.org, Jens Axboe , lkml , Zhang Rui , Srinivas Pandruvada , x86-ml Subject: Re: [PATCH] x86/thermal: Fix LVT thermal setup for SMI delivery mode In-Reply-To: References: <373464e3-b8a0-0fe0-b890-41df0eecf090@nurealm.net> <1f6c70f4-6680-d6ea-465a-548dc7698317@nurealm.net> <87h7io8kh5.ffs@nanos.tec.linutronix.de> Date: Fri, 28 May 2021 10:23:42 +0200 Message-ID: <87mtsf6zch.ffs@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 27 2021 at 20:54, Borislav Petkov wrote: > On Thu, May 27, 2021 at 01:49:42PM +0200, Thomas Gleixner wrote: >> Also if disabling this entry is causing the BIOS/SMM gunk to go south, then >> disabling CONFIG_X86_THERMAL_VECTOR should have the same effect. > > Well, I believe the latter was practically impossible: > > config X86_THERMAL_VECTOR > def_bool y > depends on X86 && CPU_SUP_INTEL && X86_LOCAL_APIC So you could disable CPU_SUP_INTEL ... Should still boot with reduced functionality. > so *if* the machine was sporting thermal SMI, then it very much needed > that code in intel_init_thermal() to unstuck the cores. At least it > looks that way... What a mess...