From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753466AbcA2KRI (ORCPT ); Fri, 29 Jan 2016 05:17:08 -0500 Received: from smtp02.smtpout.orange.fr ([80.12.242.124]:25626 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752535AbcA2KRD (ORCPT ); Fri, 29 Jan 2016 05:17:03 -0500 X-ME-Helo: belgarion X-ME-Auth: amFyem1pay5yb2JlcnRAb3JhbmdlLmZy X-ME-Date: Fri, 29 Jan 2016 11:17:02 +0100 X-ME-IP: 86.199.70.175 From: Robert Jarzmik To: Arnd Bergmann Cc: Felipe Balbi , linux-arm-kernel@lists.infradead.org, Felipe Balbi , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Haojian Zhuang , Daniel Mack , Imre Kaloz , Krzysztof Halasa , Greg Kroah-Hartman Subject: Re: [PATCH 3/7] usb: gadget: pxa25x_udc: use readl/writel for mmio References: <1453997722-3489596-1-git-send-email-arnd@arndb.de> <1453997843-3489728-1-git-send-email-arnd@arndb.de> <1453997843-3489728-3-git-send-email-arnd@arndb.de> X-URL: http://belgarath.falguerolles.org/ Date: Fri, 29 Jan 2016 11:17:01 +0100 In-Reply-To: <1453997843-3489728-3-git-send-email-arnd@arndb.de> (Arnd Bergmann's message of "Thu, 28 Jan 2016 17:17:04 +0100") Message-ID: <87mvro7krm.fsf@belgarion.home> User-Agent: Gnus/5.130008 (Ma Gnus v0.8) Emacs/24.4 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Arnd Bergmann writes: > This converts the pxa25x udc driver to use readl/writel as normal > driver should do, rather than dereferencing __iomem pointers > themselves. > > Based on the earlier preparation work, we can now also pass > the register start in the device pointer so we no longer need > the global variable. > > The unclear part here is for IXP4xx, which supports both big-endian > and little-endian configurations. So far, the driver has done > no byteswap in either case. I suspect that is wrong and it would > actually need to swap in one or the other case, but I don't know > which. It's also possible that there is some magic setting in > the chip that makes the endianess of the MMIO register match the > CPU, and in that case, the code actually does the right thing > for all configurations, both before and after this patch. > > Signed-off-by: Arnd Bergmann For pxa25x_udc: Acked-by: Robert Jarzmik Cheers. -- Robert