From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69F6DC433EF for ; Fri, 6 May 2022 11:22:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1391287AbiEFL0V (ORCPT ); Fri, 6 May 2022 07:26:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1391275AbiEFL0T (ORCPT ); Fri, 6 May 2022 07:26:19 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2287F554AF for ; Fri, 6 May 2022 04:22:37 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9A63861EDB for ; Fri, 6 May 2022 11:22:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 05987C385A9; Fri, 6 May 2022 11:22:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651836156; bh=r7OyxzyBdIaocPkug0fxzboid16Pez/XeXzUQGMJtTI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=BLEH02BfilnHklMs3uFm+MHsmCjwZKr0bJRY82MrC+0L0faHTc0Gl+pCfF0rfIlaG mAfZrdjBpvCmAionKpaPa2YlX5qe3yzGHJG9T4PuaMNXyft+1Qps/6juVmkTqhXVYs Lwv5Vqmbi0Rh0Svn7dRKK9wl6nv1hscSyZjtEzHd9msuDd8geYvh5ATH71m/yj/v8X C6iLAuUE36S2A1GQmuJI6nwEzZeVYB5DFmuD+1nHMnmMl6YBbBPQetkBolYhYxtViK PV/vIeAg4ibBLLLhTb+ixN0/NPgXR9DIPrnW5d1rrDSppDYGTbNRnwnfH/JW5MkMWX OGIzvJET8P07w== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nmw2b-009RbO-MY; Fri, 06 May 2022 12:22:33 +0100 Date: Fri, 06 May 2022 12:22:33 +0100 Message-ID: <87r1567vnq.wl-maz@kernel.org> From: Marc Zyngier To: Pali =?UTF-8?B?Um9ow6Fy?= Cc: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] irqchip/armada-370-xp: Do not allow mapping IRQ 0 and 1 In-Reply-To: <20220425113706.29310-2-pali@kernel.org> References: <20220425113706.29310-1-pali@kernel.org> <20220425113706.29310-2-pali@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: pali@kernel.org, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 25 Apr 2022 12:37:06 +0100, Pali Roh=C3=A1r wrote: >=20 > IRQs 0 and 1 cannot be mapped, they are handled internally by this driver > and this driver does not call generic_handle_domain_irq() for these IRQs. > So do not allow mapping these IRQs and correctly propagate error from the > .irq_map callback. >=20 > Signed-off-by: Pali Roh=C3=A1r > Cc: stable@vger.kernel.org > --- > drivers/irqchip/irq-armada-370-xp.c | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-ar= mada-370-xp.c > index 1120084cba09..ebd76ea1c69b 100644 > --- a/drivers/irqchip/irq-armada-370-xp.c > +++ b/drivers/irqchip/irq-armada-370-xp.c > @@ -546,6 +546,10 @@ static struct irq_chip armada_370_xp_irq_chip =3D { > static int armada_370_xp_mpic_irq_map(struct irq_domain *h, > unsigned int virq, irq_hw_number_t hw) > { > + /* IRQs 0 and 1 cannot be mapped, they are handled internally */ > + if (hw <=3D 1) > + return -EINVAL; > + > armada_370_xp_irq_mask(irq_get_irq_data(virq)); > if (!is_percpu_irq(hw)) > writel(hw, per_cpu_int_base + > --=20 > 2.20.1 >=20 >=20 Given that this is completely academic and obviously doesn't affect anyone, I have removed the Cc: stable from the patch when applying it. M. --=20 Without deviation from the norm, progress is not possible.