From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A379C433EF for ; Fri, 1 Oct 2021 09:21:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4B61B610C8 for ; Fri, 1 Oct 2021 09:21:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352972AbhJAJWx (ORCPT ); Fri, 1 Oct 2021 05:22:53 -0400 Received: from mail.kernel.org ([198.145.29.99]:57148 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229681AbhJAJWw (ORCPT ); Fri, 1 Oct 2021 05:22:52 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B67DB61A51; Fri, 1 Oct 2021 09:21:08 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mWEj4-00E9vF-ML; Fri, 01 Oct 2021 10:21:06 +0100 Date: Fri, 01 Oct 2021 10:21:06 +0100 Message-ID: <87r1d5rth9.wl-maz@kernel.org> From: Marc Zyngier To: Pingfan Liu Cc: linux-arm-kernel@lists.infradead.org, Mark Rutland , "Paul E. McKenney" , Catalin Marinas , Will Deacon , Joey Gouly , Sami Tolvanen , Julien Thierry , Thomas Gleixner , Yuichi Ito , linux-kernel@vger.kernel.org Subject: Re: [PATCHv3 2/3] arm64: entry: refactor EL1 interrupt entry logic In-Reply-To: <20210930131708.35328-3-kernelfans@gmail.com> References: <20210930131708.35328-1-kernelfans@gmail.com> <20210930131708.35328-3-kernelfans@gmail.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, paulmck@kernel.org, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, samitolvanen@google.com, julien.thierry@arm.com, tglx@linutronix.de, ito-yuichi@fujitsu.com, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 30 Sep 2021 14:17:07 +0100, Pingfan Liu wrote: > > From: Mark Rutland > > Currently we distinguish IRQ and definitely-PNMI at entry/exit time > via the enter_el1_irq_or_nmi() and enter_el1_irq_or_nmi() helpers. In > subsequent patches we'll need to handle the two cases more distinctly > in the body of the exception handler. > > To make this possible, this patch refactors el1_interrupt to be a > top-level dispatcher to separate handlers for the IRQ and PNMI cases, > removing the need for the enter_el1_irq_or_nmi() and > exit_el1_irq_or_nmi() helpers. > > Note that since arm64_enter_nmi() calls __nmi_enter(), which > increments the preemt_count, we could never preempt when handling a > PNMI. We now only check for preemption in the IRQ case, which makes > this clearer. > > There should be no functional change as a result of this patch. > > Signed-off-by: Mark Rutland > Cc: "Paul E. McKenney" > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: Joey Gouly > Cc: Sami Tolvanen > Cc: Julien Thierry > Cc: Thomas Gleixner > Cc: Yuichi Ito > Cc: Pingfan Liu > Cc: linux-kernel@vger.kernel.org > To: linux-arm-kernel@lists.infradead.org > --- > arch/arm64/kernel/entry-common.c | 44 ++++++++++++++++---------------- > 1 file changed, 22 insertions(+), 22 deletions(-) > > diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c > index 32f9796c4ffe..5f1473319fb0 100644 > --- a/arch/arm64/kernel/entry-common.c > +++ b/arch/arm64/kernel/entry-common.c > @@ -219,22 +219,6 @@ static void noinstr arm64_exit_el1_dbg(struct pt_regs *regs) > lockdep_hardirqs_on(CALLER_ADDR0); > } > > -static void noinstr enter_el1_irq_or_nmi(struct pt_regs *regs) > -{ > - if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !interrupts_enabled(regs)) > - arm64_enter_nmi(regs); > - else > - enter_from_kernel_mode(regs); > -} > - > -static void noinstr exit_el1_irq_or_nmi(struct pt_regs *regs) > -{ > - if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !interrupts_enabled(regs)) > - arm64_exit_nmi(regs); > - else > - exit_to_kernel_mode(regs); > -} > - > static void __sched arm64_preempt_schedule_irq(void) > { > lockdep_assert_irqs_disabled(); > @@ -432,14 +416,19 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs) > } > } > > -static void noinstr el1_interrupt(struct pt_regs *regs, > - void (*handler)(struct pt_regs *)) > +static __always_inline void > +__el1_pnmi(struct pt_regs *regs, void (*handler)(struct pt_regs *)) > { > - write_sysreg(DAIF_PROCCTX_NOIRQ, daif); > - > - enter_el1_irq_or_nmi(regs); > + arm64_enter_nmi(regs); > do_interrupt_handler(regs, handler); > + arm64_exit_nmi(regs); > +} > > +static __always_inline void > +__el1_interrupt(struct pt_regs *regs, void (*handler)(struct pt_regs *)) > +{ > + enter_from_kernel_mode(regs); > + do_interrupt_handler(regs, handler); > /* > * Note: thread_info::preempt_count includes both thread_info::count > * and thread_info::need_resched, and is not equivalent to > @@ -448,8 +437,19 @@ static void noinstr el1_interrupt(struct pt_regs *regs, > if (IS_ENABLED(CONFIG_PREEMPTION) && > READ_ONCE(current_thread_info()->preempt_count) == 0) > arm64_preempt_schedule_irq(); > + exit_to_kernel_mode(regs); > +} > + > +static void noinstr el1_interrupt(struct pt_regs *regs, > + void (*handler)(struct pt_regs *)) > +{ > + write_sysreg(DAIF_PROCCTX_NOIRQ, daif); > + > + if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !interrupts_enabled(regs)) > + __el1_pnmi(regs, handler); > + else > + __el1_interrupt(regs, handler); > > - exit_el1_irq_or_nmi(regs); nit: spurious blank line. > } > > asmlinkage void noinstr el1h_64_irq_handler(struct pt_regs *regs) With Mark's remark addressed, Reviewed-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.