From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C354CC433EF for ; Sat, 4 Dec 2021 14:23:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355100AbhLDO1H (ORCPT ); Sat, 4 Dec 2021 09:27:07 -0500 Received: from Galois.linutronix.de ([193.142.43.55]:33050 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233795AbhLDO1G (ORCPT ); Sat, 4 Dec 2021 09:27:06 -0500 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1638627820; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=+5b2uriykKgPHTmlAG2P2NYmE9drKwdyejG/Ik80gAI=; b=VqEkpk2BgU6O+Y29MaX161OU2b9yWfNAz2iUaQOubA4FiYI7+iPJIKB3dD8MJ7Fe6QNgEp 5tYeFFc2azHcNvMAseXMzTGvxCkAobZBxeMlf2usJ3wpBFiuOxbgy+KmYSrnvbeWQzy7V4 YPtSZYoAbm+JGhBexbQnPh90Cd1q8Bfed7Isi8siUwjujmPCzgKjImp7UQw8UONUz4FGDC UeExIEKucbZ6rfPnEN4no3d3Jk/WwdQVUdY0VhveaYiwBdI2XdoTSrVPObCtq3rR8L6xtH V21tMU4govDAsN5oT/Jxnmufigw6H7u9kROUfLXpun3a2Bb4VKxqCa9n3eE+gg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1638627820; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=+5b2uriykKgPHTmlAG2P2NYmE9drKwdyejG/Ik80gAI=; b=0mYQi0hLjkh5+1Gk0y47xn63zi1Sl239lQwP8uAeKzqHB/VVTlmmg+ceXlmtv8eFGxrht/ W8VMLZUqE0hMtLDw== To: Rob Herring Cc: Will Deacon , Mark Rutland , Peter Zijlstra , Jonathan Corbet , Catalin Marinas , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH v12 2/5] perf: Add a counter for number of user access events in context In-Reply-To: References: <20211027201641.2076427-1-robh@kernel.org> <20211027201641.2076427-3-robh@kernel.org> <87zgpl9rqq.ffs@tglx> Date: Sat, 04 Dec 2021 15:23:39 +0100 Message-ID: <87sfv84ff8.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 03 2021 at 09:58, Rob Herring wrote: > On Tue, Nov 30, 2021 at 4:57 PM Thomas Gleixner wrote: > I've rewritten it like this: > > On arm64, user space counter access will be controlled differently > compared to x86. On x86, access in the strictest mode is enabled for all > tasks in an MM when any event is mmap'ed. For arm64, access is > explicitly requested for an event and only enabled when the event's > context is active. This avoids hooks into the arch context switch code > and gives better control of when access is enabled. > > In order to configure user space access when the PMU is enabled, it is > necessary to know if any event (currently active or not) in the current > context has user space accessed enabled. Add a counter similar to other > counters in the context to avoid walking the event list every time. Reviewed-by: Thomas Gleixner