From: Thomas Gleixner <tglx@linutronix.de>
To: "Chang S. Bae" <chang.seok.bae@intel.com>,
bp@suse.de, luto@kernel.org, mingo@kernel.org, x86@kernel.org
Cc: len.brown@intel.com, lenb@kernel.org, dave.hansen@intel.com,
thiago.macieira@intel.com, jing2.liu@intel.com,
ravi.v.shankar@intel.com, linux-kernel@vger.kernel.org,
chang.seok.bae@intel.com, kvm@vger.kernel.org
Subject: Re: [PATCH v10 10/28] x86/fpu/xstate: Update the XSTATE save function to support dynamic states
Date: Fri, 01 Oct 2021 17:41:42 +0200 [thread overview]
Message-ID: <87tui04urt.ffs@tglx> (raw)
In-Reply-To: <20210825155413.19673-11-chang.seok.bae@intel.com>
On Wed, Aug 25 2021 at 08:53, Chang S. Bae wrote:
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 74dde635df40..7c46747f6865 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -9899,11 +9899,16 @@ static void kvm_save_current_fpu(struct fpu *fpu)
> * KVM does not support dynamic user states yet. Assume the buffer
> * always has the minimum size.
> */
> - if (test_thread_flag(TIF_NEED_FPU_LOAD))
> + if (test_thread_flag(TIF_NEED_FPU_LOAD)) {
> memcpy(fpu->state, current->thread.fpu.state,
> fpu_buf_cfg.min_size);
What happens with the rest of the state?
> - else
> + } else {
> + struct fpu *src_fpu = ¤t->thread.fpu;
> +
> + if (fpu->state_mask != src_fpu->state_mask)
> + fpu->state_mask = src_fpu->state_mask;
What guarantees that the state size of @fpu is big enough when src_fpu
has dynamic features included?
> save_fpregs_to_fpstate(fpu);
Thanks,
tglx
next prev parent reply other threads:[~2021-10-01 15:41 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 15:53 [PATCH v10 00/28] x86: Support Intel Advanced Matrix Extensions Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 01/28] x86/fpu/xstate: Fix the state copy function to the XSTATE buffer Chang S. Bae
2021-10-01 12:44 ` Thomas Gleixner
2021-10-03 22:34 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 02/28] x86/fpu/xstate: Modify the initialization helper to handle both static and dynamic buffers Chang S. Bae
2021-10-01 12:45 ` Thomas Gleixner
2021-10-03 22:35 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 03/28] x86/fpu/xstate: Modify state copy helpers " Chang S. Bae
2021-10-01 12:47 ` Thomas Gleixner
2021-10-03 22:42 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 04/28] x86/fpu/xstate: Modify address finders " Chang S. Bae
2021-10-01 13:15 ` Thomas Gleixner
2021-10-03 22:35 ` Bae, Chang Seok
2021-10-04 12:54 ` Thomas Gleixner
2021-08-25 15:53 ` [PATCH v10 05/28] x86/fpu/xstate: Add a new variable to indicate dynamic user states Chang S. Bae
2021-10-01 13:16 ` Thomas Gleixner
2021-10-03 22:35 ` Bae, Chang Seok
2021-10-04 12:57 ` Thomas Gleixner
2021-08-25 15:53 ` [PATCH v10 06/28] x86/fpu/xstate: Add new variables to indicate dynamic XSTATE buffer size Chang S. Bae
2021-10-01 13:32 ` Thomas Gleixner
2021-10-03 22:36 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 07/28] x86/fpu/xstate: Calculate and remember dynamic XSTATE buffer sizes Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 08/28] x86/fpu/xstate: Convert the struct fpu 'state' field to a pointer Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 09/28] x86/fpu/xstate: Introduce helpers to manage the XSTATE buffer dynamically Chang S. Bae
2021-10-01 14:20 ` Thomas Gleixner
2021-10-03 22:36 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 10/28] x86/fpu/xstate: Update the XSTATE save function to support dynamic states Chang S. Bae
2021-10-01 15:41 ` Thomas Gleixner [this message]
2021-10-02 21:31 ` Thomas Gleixner
2021-10-02 22:54 ` Bae, Chang Seok
2021-10-05 8:16 ` Paolo Bonzini
2021-10-05 7:50 ` Paolo Bonzini
2021-10-05 9:55 ` Thomas Gleixner
2021-08-25 15:53 ` [PATCH v10 11/28] x86/fpu/xstate: Update the XSTATE buffer address finder " Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 12/28] x86/fpu/xstate: Update the XSTATE context copy function " Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 13/28] x86/fpu/xstate: Use feature disable (XFD) to protect dynamic user state Chang S. Bae
2021-10-01 15:02 ` Thomas Gleixner
2021-10-01 15:10 ` Thomas Gleixner
2021-10-03 22:38 ` Bae, Chang Seok
2021-10-04 12:35 ` Thomas Gleixner
2021-10-01 20:20 ` Thomas Gleixner
2021-10-03 22:39 ` Bae, Chang Seok
2021-10-04 19:03 ` Thomas Gleixner
2021-10-03 22:41 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 14/28] x86/fpu/xstate: Support ptracer-induced XSTATE buffer expansion Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 15/28] x86/arch_prctl: Create ARCH_SET_STATE_ENABLE/ARCH_GET_STATE_ENABLE Chang S. Bae
2021-08-25 16:36 ` Bae, Chang Seok
2021-08-25 15:54 ` [PATCH v10 16/28] x86/fpu/xstate: Support both legacy and expanded signal XSTATE size Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 17/28] x86/fpu/xstate: Adjust the XSAVE feature table to address gaps in state component numbers Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 18/28] x86/fpu/xstate: Disable XSTATE support if an inconsistent state is detected Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 19/28] x86/cpufeatures/amx: Enumerate Advanced Matrix Extension (AMX) feature bits Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 20/28] x86/fpu/amx: Define AMX state components and have it used for boot-time checks Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 21/28] x86/fpu/amx: Initialize child's AMX state Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 22/28] x86/fpu/amx: Enable the AMX feature in 64-bit mode Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 23/28] x86/fpu/xstate: Skip writing zeros to signal frame for dynamic user states if in INIT-state Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 24/28] selftest/x86/amx: Test cases for the AMX state management Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 25/28] x86/insn/amx: Add TILERELEASE instruction to the opcode map Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 26/28] intel_idle/amx: Add SPR support with XTILEDATA capability Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 27/28] x86/fpu/xstate: Add a sanity check for XFD state when saving XSTATE Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 28/28] x86/arch_prctl: ARCH_GET_FEATURES_WITH_KERNEL_ASSISTANCE Chang S. Bae
2021-09-30 21:12 ` [PATCH v10 00/28] x86: Support Intel Advanced Matrix Extensions Len Brown
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