From: Francisco Jerez <currojerez@riseup.net>
To: "Rafael J. Wysocki" <rjw@rjwysocki.net>,
Linux PM <linux-pm@vger.kernel.org>
Cc: Linux Documentation <linux-doc@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Giovanni Gherdovich <ggherdovich@suse.cz>,
Doug Smythies <dsmythies@telus.net>
Subject: Re: [PATCH v4 1/2] cpufreq: intel_pstate: Rearrange the storing of new EPP values
Date: Wed, 29 Jul 2020 18:31:07 -0700 [thread overview]
Message-ID: <87wo2leqlg.fsf@riseup.net> (raw)
In-Reply-To: <1665283.zxI7kaGBi8@kreacher>
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"Rafael J. Wysocki" <rjw@rjwysocki.net> writes:
> From: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
>
> Move the locking away from intel_pstate_set_energy_pref_index()
> into its only caller and drop the (now redundant) return_pref label
> from it.
>
> Also move the "raw" EPP value check into the caller of that function,
> so as to do it before acquiring the mutex, and reduce code duplication
> related to the "raw" EPP values processing somewhat.
>
> No intentional functional impact.
>
> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
> ---
>
> v2 -> v3:
>
> * Fix error handling in intel_pstate_set_energy_pref_index() and
> rebase.
>
> v3 -> v4: No changes
>
> ---
> drivers/cpufreq/intel_pstate.c | 35 +++++++++++++++--------------------
> 1 file changed, 15 insertions(+), 20 deletions(-)
>
> Index: linux-pm/drivers/cpufreq/intel_pstate.c
> ===================================================================
> --- linux-pm.orig/drivers/cpufreq/intel_pstate.c
> +++ linux-pm/drivers/cpufreq/intel_pstate.c
> @@ -649,28 +649,18 @@ static int intel_pstate_set_energy_pref_
> if (!pref_index)
> epp = cpu_data->epp_default;
>
> - mutex_lock(&intel_pstate_limits_lock);
> -
> if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
> u64 value;
>
> ret = rdmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST, &value);
> if (ret)
> - goto return_pref;
> + return ret;
>
> value &= ~GENMASK_ULL(31, 24);
>
> - if (use_raw) {
> - if (raw_epp > 255) {
> - ret = -EINVAL;
> - goto return_pref;
> - }
> - value |= (u64)raw_epp << 24;
> - ret = wrmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST, value);
> - goto return_pref;
> - }
> -
> - if (epp == -EINVAL)
> + if (use_raw)
> + epp = raw_epp;
> + else if (epp == -EINVAL)
> epp = epp_values[pref_index - 1];
>
> value |= (u64)epp << 24;
> @@ -680,8 +670,6 @@ static int intel_pstate_set_energy_pref_
> epp = (pref_index - 1) << 2;
> ret = intel_pstate_set_epb(cpu_data->cpu, epp);
> }
> -return_pref:
> - mutex_unlock(&intel_pstate_limits_lock);
>
> return ret;
> }
> @@ -708,8 +696,8 @@ static ssize_t store_energy_performance_
> struct cpudata *cpu_data = all_cpu_data[policy->cpu];
> char str_preference[21];
> bool raw = false;
> + ssize_t ret;
> u32 epp = 0;
> - int ret;
>
> ret = sscanf(buf, "%20s", str_preference);
> if (ret != 1)
> @@ -724,14 +712,21 @@ static ssize_t store_energy_performance_
> if (ret)
> return ret;
>
> + if (epp > 255)
> + return -EINVAL;
> +
> raw = true;
> }
>
> + mutex_lock(&intel_pstate_limits_lock);
> +
> ret = intel_pstate_set_energy_pref_index(cpu_data, ret, raw, epp);
> - if (ret)
> - return ret;
> + if (!ret)
> + ret = count;
>
> - return count;
> + mutex_unlock(&intel_pstate_limits_lock);
> +
> + return ret;
> }
>
> static ssize_t show_energy_performance_preference(
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next prev parent reply other threads:[~2020-07-30 1:31 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-16 17:37 [PATCH v2 0/2] cpufreq: intel_pstate: Implement passive mode with HWP enabled Rafael J. Wysocki
2020-07-16 17:38 ` [PATCH v2 1/2] cpufreq: intel_pstate: Rearrange the storing of newv EPP values Rafael J. Wysocki
2020-07-16 17:42 ` [PATCH v2 2/2] cpufreq: intel_pstate: Implement passive mode with HWP enabled Rafael J. Wysocki
2020-07-31 11:59 ` [cpufreq] 48fc4efcdd: WARNING:possible_circular_locking_dependency_detected kernel test robot
2020-07-31 23:25 ` Francisco Jerez
2020-08-03 17:19 ` Rafael J. Wysocki
2020-07-27 15:13 ` [PATCH v3 0/2] cpufreq: intel_pstate: Implement passive mode with HWP enabled Rafael J. Wysocki
2020-07-27 15:15 ` [PATCH v3 1/2] cpufreq: intel_pstate: Rearrange the storing of new EPP values Rafael J. Wysocki
2020-07-27 15:17 ` [PATCH v3 2/2] cpufreq: intel_pstate: Implement passive mode with HWP enabled Rafael J. Wysocki
2020-07-28 15:09 ` [PATCH v4 0/2] " Rafael J. Wysocki
2020-07-28 15:11 ` [PATCH v4 1/2] cpufreq: intel_pstate: Rearrange the storing of new EPP values Rafael J. Wysocki
2020-07-30 1:31 ` Francisco Jerez [this message]
2020-07-28 15:13 ` [PATCH v4 2/2] cpufreq: intel_pstate: Implement passive mode with HWP enabled Rafael J. Wysocki
2020-08-01 23:21 ` Srinivas Pandruvada
2020-08-02 14:14 ` Doug Smythies
2020-08-02 19:20 ` Srinivas Pandruvada
2020-08-03 17:17 ` [PATCH v5] " Rafael J. Wysocki
2020-08-01 16:39 ` [PATCH v4 0/2] " Srinivas Pandruvada
2020-08-02 14:00 ` Doug Smythies
2020-08-02 18:39 ` Srinivas Pandruvada
2020-08-03 0:26 ` Doug Smythies
2020-08-03 17:23 ` Rafael J. Wysocki
2020-08-04 15:10 ` [PATCH v6] " Rafael J. Wysocki
2020-08-04 17:04 ` Doug Smythies
2020-08-05 9:34 ` Rafael J. Wysocki
2020-08-05 15:38 ` Srinivas Pandruvada
2020-08-05 16:28 ` Rafael J. Wysocki
2020-08-05 16:55 ` [PATCH v7] " Rafael J. Wysocki
2020-08-06 5:55 ` Doug Smythies
2020-08-06 11:25 ` Rafael J. Wysocki
2020-08-06 12:03 ` Rafael J. Wysocki
2020-08-10 0:44 ` Srinivas Pandruvada
2020-08-11 0:51 ` Francisco Jerez
2020-08-11 15:33 ` Rafael J. Wysocki
2020-08-17 21:06 ` Doug Smythies
2020-09-07 0:16 ` Doug Smythies
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