From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9AC9C433E0 for ; Mon, 18 May 2020 18:47:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A2E7720756 for ; Mon, 18 May 2020 18:47:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589827622; bh=np71XU62FUm0whMwMw2sawHrsAOJPGoTL5ij4xqGKcw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=l6EKAF08kaE4w1wvvCYnHfVJhaQjl8uOwSCrHXC6vm8jLZbqNkcuFsCOHKmi1suLi jV3B+rXPtk1eV/vG+BZTPhsAj9cNUeGXaHdqsSKl9FWmX2WIr50JLM2ZcyJY457u38 17snwGZ0EPCYrMjtAVQmS9RpUiHmxhxec7pHJio4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729250AbgERSrC (ORCPT ); Mon, 18 May 2020 14:47:02 -0400 Received: from mail.kernel.org ([198.145.29.99]:56556 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727938AbgERSrB (ORCPT ); Mon, 18 May 2020 14:47:01 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D46D620715; Mon, 18 May 2020 18:47:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589827621; bh=np71XU62FUm0whMwMw2sawHrsAOJPGoTL5ij4xqGKcw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=tnqG4tyaOPRoZslxWOY1GWWmpfUdvOAkktQUnXuYRIg8TqXbYdqK3pNyd6d2y6MFL ZxiSprpQy1m67J2GaHmf/fJ1aMDxAOrEBaijSiBLUI9RMwI65ohe9RS6orBC+V3e7+ WAB6u1+/2pMwLerDv2sPzCxrN9zge/pxZqBCq3CM= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jakmx-00DNi3-7X; Mon, 18 May 2020 19:46:59 +0100 Date: Mon, 18 May 2020 19:46:58 +0100 Message-ID: <87y2ppytb1.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: Anshuman Khandual , mark.rutland@arm.com, Catalin Marinas , linux-kernel@vger.kernel.org, James Morse , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH V2] arm64/cpufeature: Drop open encodings while extracting parange In-Reply-To: <20200518170934.GT32394@willie-the-truck> References: <1589360614-1164-1-git-send-email-anshuman.khandual@arm.com> <20200518165958.GS32394@willie-the-truck> <20200518170934.GT32394@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: will@kernel.org, anshuman.khandual@arm.com, mark.rutland@arm.com, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, james.morse@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 18 May 2020 18:09:34 +0100, Will Deacon wrote: > > On Mon, May 18, 2020 at 05:59:59PM +0100, Will Deacon wrote: > > On Wed, May 13, 2020 at 02:33:34PM +0530, Anshuman Khandual wrote: > > > Currently there are multiple instances of parange feature width mask open > > > encodings while fetching it's value. Even the width mask value (0x7) itself > > > is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in > > > ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field() > > > which can extract given standard feature (4 bits width i.e 0xf mask) field. > > > > > > Cc: Catalin Marinas > > > Cc: Will Deacon > > > Cc: Marc Zyngier > > > Cc: James Morse > > > Cc: kvmarm@lists.cs.columbia.edu > > > Cc: linux-arm-kernel@lists.infradead.org > > > Cc: linux-kernel@vger.kernel.org > > > > > > Signed-off-by: Anshuman Khandual > > > --- > > > Changes in V2: > > > > > > - Used cpuid_feature_extract_unsigned_field() per Mark > > > > > > Changes in V1: (https://patchwork.kernel.org/patch/11541913/) > > > > > > arch/arm64/kernel/cpufeature.c | 3 ++- > > > arch/arm64/kvm/reset.c | 11 ++++++++--- > > > 2 files changed, 10 insertions(+), 4 deletions(-) > > > > Acked-by: Will Deacon > > > > I'm assuming Marc will take this, but let me know if it should go via arm64 > > instead (where we have a bunch of other cpufeature stuff queued). > > Hmm, but having just spotted [1], it looks like we might need a bit of > co-ordination here. Marc? Yeah, there is a clear dependency between the two. I'm happy to take both patches via the KVM tree, or to have a shared branch with the arm64 tree (we already have one for Andrew's generic AT patch). Just let me know, M. -- Without deviation from the norm, progress is not possible.