From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 021F2C43218 for ; Fri, 26 Apr 2019 06:45:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C7F6C206DD for ; Fri, 26 Apr 2019 06:45:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726206AbfDZGps (ORCPT ); Fri, 26 Apr 2019 02:45:48 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:41180 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725893AbfDZGpq (ORCPT ); Fri, 26 Apr 2019 02:45:46 -0400 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x3Q6iNV2060240 for ; Fri, 26 Apr 2019 02:45:44 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2s3vyyr1j1-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 26 Apr 2019 02:45:44 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 26 Apr 2019 07:45:40 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x3Q6jdGA55705852 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 26 Apr 2019 06:45:39 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 79EFD42049; Fri, 26 Apr 2019 06:45:39 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0790542045; Fri, 26 Apr 2019 06:45:38 +0000 (GMT) Received: from skywalker.linux.ibm.com (unknown [9.193.89.254]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 26 Apr 2019 06:45:37 +0000 (GMT) X-Mailer: emacs 26.1 (via feedmail 11-beta-1 Q) From: "Aneesh Kumar K.V" To: Christophe Leroy , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 04/11] powerpc/mm: move slice_mask_for_size() into mmu.h In-Reply-To: References: Date: Fri, 26 Apr 2019 12:06:55 +0530 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 x-cbid: 19042606-0016-0000-0000-0000027561C0 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19042606-0017-0000-0000-000032D1DD43 Message-Id: <87zhod9ss8.fsf@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-04-26_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1904260048 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Christophe Leroy writes: > Move slice_mask_for_size() into subarch mmu.h > > At the same time, replace BUG() by VM_BUG_ON() as those BUG() are not > there to catch runtime errors but to catch errors during development > cycle only. > Reviewed-by: Aneesh Kumar K.V > Signed-off-by: Christophe Leroy > --- > arch/powerpc/include/asm/book3s/64/mmu.h | 17 +++++++++++ > arch/powerpc/include/asm/nohash/32/mmu-8xx.h | 42 +++++++++++++++++++--------- > arch/powerpc/mm/slice.c | 34 ---------------------- > 3 files changed, 46 insertions(+), 47 deletions(-) > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h > index 230a9dec7677..ad00355f874f 100644 > --- a/arch/powerpc/include/asm/book3s/64/mmu.h > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h > @@ -203,6 +203,23 @@ static inline struct slice_mask *mm_ctx_slice_mask_16g(mm_context_t *ctx) > } > #endif > > +static inline struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) > +{ > +#ifdef CONFIG_PPC_64K_PAGES > + if (psize == MMU_PAGE_64K) > + return mm_ctx_slice_mask_64k(&ctx); > +#endif > +#ifdef CONFIG_HUGETLB_PAGE > + if (psize == MMU_PAGE_16M) > + return mm_ctx_slice_mask_16m(&ctx); > + if (psize == MMU_PAGE_16G) > + return mm_ctx_slice_mask_16g(&ctx); > +#endif > + VM_BUG_ON(psize != MMU_PAGE_4K); > + > + return mm_ctx_slice_mask_4k(&ctx); > +} > + > #ifdef CONFIG_PPC_SUBPAGE_PROT > static inline struct subpage_prot_table *mm_ctx_subpage_prot(mm_context_t *ctx) > { > diff --git a/arch/powerpc/include/asm/nohash/32/mmu-8xx.h b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h > index c503e2f05e61..a0f6844a1498 100644 > --- a/arch/powerpc/include/asm/nohash/32/mmu-8xx.h > +++ b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h > @@ -184,7 +184,23 @@ > #define LOW_SLICE_ARRAY_SZ SLICE_ARRAY_SIZE > #endif > > +#if defined(CONFIG_PPC_4K_PAGES) > +#define mmu_virtual_psize MMU_PAGE_4K > +#elif defined(CONFIG_PPC_16K_PAGES) > +#define mmu_virtual_psize MMU_PAGE_16K > +#define PTE_FRAG_NR 4 > +#define PTE_FRAG_SIZE_SHIFT 12 > +#define PTE_FRAG_SIZE (1UL << 12) > +#else > +#error "Unsupported PAGE_SIZE" > +#endif > + > +#define mmu_linear_psize MMU_PAGE_8M > + > #ifndef __ASSEMBLY__ > + > +#include > + > struct slice_mask { > u64 low_slices; > DECLARE_BITMAP(high_slices, 0); > @@ -255,6 +271,19 @@ static inline struct slice_mask *mm_ctx_slice_mask_8m(mm_context_t *ctx) > return &ctx->mask_8m; > } > #endif > + > +static inline struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) > +{ > +#ifdef CONFIG_HUGETLB_PAGE > + if (psize == MMU_PAGE_512K) > + return &ctx->mask_512k; > + if (psize == MMU_PAGE_8M) > + return &ctx->mask_8m; > +#endif > + VM_BUG_ON(psize != mmu_virtual_psize); > + > + return &ctx->mask_base_psize; > +} > #endif /* CONFIG_PPC_MM_SLICE */ > > #define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000) > @@ -306,17 +335,4 @@ extern s32 patch__itlbmiss_perf, patch__dtlbmiss_perf; > > #endif /* !__ASSEMBLY__ */ > > -#if defined(CONFIG_PPC_4K_PAGES) > -#define mmu_virtual_psize MMU_PAGE_4K > -#elif defined(CONFIG_PPC_16K_PAGES) > -#define mmu_virtual_psize MMU_PAGE_16K > -#define PTE_FRAG_NR 4 > -#define PTE_FRAG_SIZE_SHIFT 12 > -#define PTE_FRAG_SIZE (1UL << 12) > -#else > -#error "Unsupported PAGE_SIZE" > -#endif > - > -#define mmu_linear_psize MMU_PAGE_8M > - > #endif /* _ASM_POWERPC_MMU_8XX_H_ */ > diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c > index 8eb7e8b09c75..31de91b65a64 100644 > --- a/arch/powerpc/mm/slice.c > +++ b/arch/powerpc/mm/slice.c > @@ -150,40 +150,6 @@ static void slice_mask_for_free(struct mm_struct *mm, struct slice_mask *ret, > __set_bit(i, ret->high_slices); > } > > -#ifdef CONFIG_PPC_BOOK3S_64 > -static struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) > -{ > -#ifdef CONFIG_PPC_64K_PAGES > - if (psize == MMU_PAGE_64K) > - return mm_ctx_slice_mask_64k(&ctx); > -#endif > - if (psize == MMU_PAGE_4K) > - return mm_ctx_slice_mask_4k(&ctx); > -#ifdef CONFIG_HUGETLB_PAGE > - if (psize == MMU_PAGE_16M) > - return mm_ctx_slice_mask_16m(&ctx); > - if (psize == MMU_PAGE_16G) > - return mm_ctx_slice_mask_16g(&ctx); > -#endif > - BUG(); > -} > -#elif defined(CONFIG_PPC_8xx) > -static struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) > -{ > - if (psize == mmu_virtual_psize) > - return &ctx->mask_base_psize; > -#ifdef CONFIG_HUGETLB_PAGE > - if (psize == MMU_PAGE_512K) > - return &ctx->mask_512k; > - if (psize == MMU_PAGE_8M) > - return &ctx->mask_8m; > -#endif > - BUG(); > -} > -#else > -#error "Must define the slice masks for page sizes supported by the platform" > -#endif > - > static bool slice_check_range_fits(struct mm_struct *mm, > const struct slice_mask *available, > unsigned long start, unsigned long len) > -- > 2.13.3