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From: Ashish Mhetre <amhetre@nvidia.com>
To: Dmitry Osipenko <dmitry.osipenko@collabora.com>,
	Dmitry Osipenko <digetx@gmail.com>,
	krzysztof.kozlowski@linaro.org, thierry.reding@gmail.com,
	jonathanh@nvidia.com, robh+dt@kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-tegra@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc: vdumpa@nvidia.com, Snikam@nvidia.com
Subject: Re: [Patch v6 3/4] dt-bindings: memory: Update reg maxitems for tegra186
Date: Mon, 11 Apr 2022 21:11:29 +0530	[thread overview]
Message-ID: <8930bbfe-2c33-ea90-c48d-c6a00005b6a5@nvidia.com> (raw)
In-Reply-To: <57825f4a-8cfa-ef00-6462-fea37cd4d7be@collabora.com>



On 4/11/2022 8:59 PM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
> 
> 
> On 4/11/22 18:02, Ashish Mhetre wrote:
>>
>>
>> On 4/10/2022 7:51 PM, Dmitry Osipenko wrote:
>>> External email: Use caution opening links or attachments
>>>
>>>
>>> 06.04.2022 08:24, Ashish Mhetre пишет:
>>>>            memory-controller@2c00000 {
>>>>                compatible = "nvidia,tegra186-mc";
>>>> -            reg = <0x0 0x02c00000 0x0 0xb0000>;
>>>> +            reg = <0x0 0x02c00000 0x0 0x10000>,    /* MC-SID */
>>>> +                  <0x0 0x02c10000 0x0 0x10000>,    /* Broadcast
>>>> channel */
>>>> +                  <0x0 0x02c20000 0x0 0x10000>,    /* MC0 */
>>>> +                  <0x0 0x02c30000 0x0 0x10000>,    /* MC1 */
>>>> +                  <0x0 0x02c40000 0x0 0x10000>,    /* MC2 */
>>>> +                  <0x0 0x02c50000 0x0 0x10000>;    /* MC3 */
>>>> +            reg-names = "mc-sid", "mc-broadcast", "mc0", "mc1",
>>>> "mc2", "mc3";
>>>
>>> The "mc-" prefix feels redundant to me, I'd name the regs like this:
>>>
>>>     "sid", "broadcast", "ch0", "ch1", "ch2", "ch3"
>>>
>>>
>>> You should also add validation of the regs/reg-names to the yaml based
>>> on SoC version. I.e. it's not enough to only bump the maxItems.
>>
>> Okay, I will add validation of reg-names as following:
>>
>>    reg-names:
>>      minItems: 0
>>      maxItems: 6
>>      items:
>>        - const: sid
>>        - const: broadcast
>>        - const: ch0
>>        - const: ch1
>>        - const: ch2
>>        - const: ch3
>>
>>
>> We will have to keep minItems to 0 in order to make it compatible with
>> old DT, right?
> 
> Bindings are about the latest DTs. In general older dtbs must be updated
> and you must get error from the schema checker for older DTs. It's only
> drivers that should care about older dtbs.

On v5 Krzysztof mentioned that old DTS will start failing with new
bindings https://lkml.org/lkml/2022/3/22/907.
So I just wanted to confirm whether it's fine if updated bindings
start to fail with old DTS?

  reply	other threads:[~2022-04-11 15:41 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-06  5:24 [Patch v6 0/4] memory: tegra: Add MC channels and error logging Ashish Mhetre
2022-04-06  5:24 ` [Patch v6 1/4] memory: tegra: Add memory controller channels support Ashish Mhetre
2022-04-10 14:18   ` Dmitry Osipenko
2022-04-11  6:05     ` Ashish Mhetre
2022-04-11  6:33       ` Dmitry Osipenko
2022-04-11  7:28         ` Ashish Mhetre
2022-04-11  7:35           ` Dmitry Osipenko
2022-04-11  9:18             ` Ashish Mhetre
2022-04-11 11:13               ` Dmitry Osipenko
2022-04-10 15:01   ` Dmitry Osipenko
2022-04-11  6:18     ` Ashish Mhetre
2022-04-10 15:04   ` Dmitry Osipenko
2022-04-11  6:20     ` Ashish Mhetre
2022-04-06  5:24 ` [Patch v6 2/4] memory: tegra: Add MC error logging on tegra186 onward Ashish Mhetre
2022-04-10 14:55   ` Dmitry Osipenko
2022-04-11  6:17     ` Ashish Mhetre
2022-04-06  5:24 ` [Patch v6 3/4] dt-bindings: memory: Update reg maxitems for tegra186 Ashish Mhetre
2022-04-10 14:21   ` Dmitry Osipenko
2022-04-11  6:09     ` Ashish Mhetre
2022-04-11 15:02     ` Ashish Mhetre
2022-04-11 15:29       ` Dmitry Osipenko
2022-04-11 15:41         ` Ashish Mhetre [this message]
2022-04-11 22:28           ` Dmitry Osipenko
2022-04-12  4:11             ` Ashish Mhetre
2022-04-06  5:24 ` [Patch v6 4/4] arm64: tegra: Add memory controller channels Ashish Mhetre

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