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([2601:646:c200:7429:4492:ec6e:54db:bcc9]) by smtp.gmail.com with ESMTPSA id d7-v6sm6453796pfm.23.2018.10.03.07.20.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Oct 2018 07:20:48 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (1.0) Subject: Re: [patch 00/11] x86/vdso: Cleanups, simmplifications and CLOCK_TAI support From: Andy Lutomirski X-Mailer: iPhone Mail (16A366) In-Reply-To: <87murvdysd.fsf@vitty.brq.redhat.com> Date: Wed, 3 Oct 2018 07:20:48 -0700 Cc: Andy Lutomirski , Thomas Gleixner , Marcelo Tosatti , Paolo Bonzini , Radim Krcmar , Wanpeng Li , LKML , X86 ML , Peter Zijlstra , Matt Rickard , Stephen Boyd , John Stultz , Florian Weimer , KY Srinivasan , devel@linuxdriverproject.org, Linux Virtualization , Arnd Bergmann , Juergen Gross Content-Transfer-Encoding: quoted-printable Message-Id: <8C316427-8BEC-4979-8AB2-5E385066BB6F@amacapital.net> References: <20180914125006.349747096@linutronix.de> <87sh1ne64t.fsf@vitty.brq.redhat.com> <4B6A97E1-17E6-40F2-A7A0-87731668A07C@amacapital.net> <87murvdysd.fsf@vitty.brq.redhat.com> To: Vitaly Kuznetsov Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Oct 3, 2018, at 5:01 AM, Vitaly Kuznetsov wrote: >=20 > Andy Lutomirski writes: >=20 >>> On Oct 3, 2018, at 2:22 AM, Vitaly Kuznetsov wrote= : >>>=20 >>> Andy Lutomirski writes: >>>=20 >>>> Hi Vitaly, Paolo, Radim, etc., >>>>=20 >>> The notification you're talking about exists, it is called >>> Reenligntenment, see 0092e4346f49 "x86/kvm: Support Hyper-V >>> reenlightenment"). When TSC page changes (and this only happens when L1 >>> is migrated to a different host with a different TSC frequency and TSC >>> scaling is not supported by the CPU) we receive an interrupt in L1 (at >>> this moment all TSC accesses are emulated which guarantees the >>> correctness of the readings), pause all L2 guests, update their kvmclock= >>> structures with new data (we already know the new TSC frequency) and >>> then tell L0 that we're done and it can stop emulating TSC accesses. >>=20 >> That=E2=80=99s delightful! Does the emulation magic also work for L1 use= r >> mode? >=20 > As far as I understand - yes, all rdtsc* calls will trap into L0. >=20 >> If so, couldn=E2=80=99t we drop the HyperV vclock entirely and just >> fold the adjustment into the core timekeeping data? (Preferably the >> actual core data, which would require core changes, but it could >> plausibly be done in arch code, too.) >=20 > Not all Hyper-V hosts support reenlightenment notifications (and, if I'm > not mistaken, you need to enable nesting for the VM to get the feature - > and most VMs don't have this) so I think we'll have to keep Hyper-V > vclock for the time being. >=20 >=20 But this does suggest that the correct way to pass a clock through to an L2 g= uest where L0 is HV is to make L1 use the =E2=80=9Ctsc=E2=80=9D clock and L2= use kvmclock (or something newer and better). This would require adding su= pport for atomic frequency changes all the way through the timekeeping and a= rch code. John, tglx, would that be okay or crazy?=