linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: andrew.murray@arm.com, maz@kernel.org,
	linux-kernel@vger.kernel.org,
	Florian Fainelli <f.fainelli@gmail.com>,
	bcm-kernel-feedback-list@broadcom.com,
	james.quinlan@broadcom.com, mbrugger@suse.com,
	phil@raspberrypi.org, wahrenst@gmx.net, jeremy.linton@arm.com,
	linux-pci@vger.kernel.org, linux-rpi-kernel@lists.infradead.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 3/6] PCI: brcmstb: Add Broadcom STB PCIe host controller driver
Date: Tue, 14 Jan 2020 19:18:46 +0100	[thread overview]
Message-ID: <8a7057fe1aaf415272d28f4e690313984c3a148d.camel@suse.de> (raw)
In-Reply-To: <20200114171101.GA11177@e121166-lin.cambridge.arm.com>

[-- Attachment #1: Type: text/plain, Size: 2067 bytes --]

Hi Lorenzo,

On Tue, 2020-01-14 at 17:11 +0000, Lorenzo Pieralisi wrote:
> On Mon, Dec 16, 2019 at 12:01:09PM +0100, Nicolas Saenz Julienne wrote:
> > From: Jim Quinlan <james.quinlan@broadcom.com>
> > 
> > This adds a basic driver for Broadcom's STB PCIe controller, for now
> > aimed at Raspberry Pi 4's SoC, bcm2711.
> > 
> > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> > Co-developed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> > Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
> > 
> > ---
> > 
> > Changes since v3:
> >   - Update commit message
> >   - rollback roundup_pow_two usage, it'll be updated later down the line
> >   - Remove comment in register definition
> > 
> > Changes since v2:
> >   - Correct rc_bar2_offset sign
> 
> In relation to this change.
> 
> [...]
> 
> > +static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie
> > *pcie,
> > +							u64 *rc_bar2_size,
> > +							u64 *rc_bar2_offset)
> > +{
> > +	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
> > +	struct device *dev = pcie->dev;
> > +	struct resource_entry *entry;
> > +
> > +	entry = resource_list_first_type(&bridge->dma_ranges, IORESOURCE_MEM);
> > +	if (!entry)
> > +		return -ENODEV;
> > +
> > +	*rc_bar2_offset = -entry->offset;
> 
> I think this deserves a comment - I guess it has to do with how the
> controller expects CPU<->PCI offsets to be expressed compared to how it
> is computed in dma_ranges entries.

You're right, OF code calculates it by doing:

	offset = cpu_start_addr - pci_start_addr (see
devm_of_pci_get_host_bridge_resources())

While the RC_BAR2_CONFIG register expects the opposite subtraction. I'll add a
comment on the next revision.

> I will try to complete the review shortly and try to apply it given
> that it has already been reviewed by others.

Thanks!

Regards,
Nicolas

> Lorenzo
> 


[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

  reply	other threads:[~2020-01-14 18:18 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-16 11:01 [PATCH v5 0/6] Raspberry Pi 4 PCIe support Nicolas Saenz Julienne
2019-12-16 11:01 ` [PATCH v5 1/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device Nicolas Saenz Julienne
2019-12-16 11:14   ` Matthias Brugger
2019-12-16 11:18     ` Nicolas Saenz Julienne
2019-12-16 11:01 ` [PATCH v5 2/6] ARM: dts: bcm2711: Enable PCIe controller Nicolas Saenz Julienne
2020-01-14 18:11   ` Lorenzo Pieralisi
2020-01-14 18:15     ` Florian Fainelli
2020-01-15 23:41   ` Florian Fainelli
2019-12-16 11:01 ` [PATCH v5 3/6] PCI: brcmstb: Add Broadcom STB PCIe host controller driver Nicolas Saenz Julienne
2020-01-14 17:11   ` Lorenzo Pieralisi
2020-01-14 18:18     ` Nicolas Saenz Julienne [this message]
2020-01-15 10:00       ` Lorenzo Pieralisi
2020-01-15 11:29         ` Nicolas Saenz Julienne
2019-12-16 11:01 ` [PATCH v5 4/6] PCI: brcmstb: Add MSI support Nicolas Saenz Julienne
2019-12-16 11:01 ` [PATCH v5 5/6] MAINTAINERS: Add brcmstb PCIe controller Nicolas Saenz Julienne
2020-01-15 23:41   ` Florian Fainelli
2019-12-16 11:01 ` [PATCH v5 6/6] arm64: defconfig: Enable Broadcom's STB " Nicolas Saenz Julienne
2020-01-16 17:21   ` Florian Fainelli
2019-12-16 11:36 ` [PATCH v5 0/6] Raspberry Pi 4 PCIe support Andrew Murray
2019-12-16 11:45   ` Nicolas Saenz Julienne
2020-01-15 12:02 ` Lorenzo Pieralisi
2020-01-15 12:45   ` Nicolas Saenz Julienne

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8a7057fe1aaf415272d28f4e690313984c3a148d.camel@suse.de \
    --to=nsaenzjulienne@suse.de \
    --cc=andrew.murray@arm.com \
    --cc=bcm-kernel-feedback-list@broadcom.com \
    --cc=bhelgaas@google.com \
    --cc=f.fainelli@gmail.com \
    --cc=james.quinlan@broadcom.com \
    --cc=jeremy.linton@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-rpi-kernel@lists.infradead.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=maz@kernel.org \
    --cc=mbrugger@suse.com \
    --cc=phil@raspberrypi.org \
    --cc=wahrenst@gmx.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).