From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38947C433F5 for ; Fri, 1 Oct 2021 10:44:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1748B61A38 for ; Fri, 1 Oct 2021 10:44:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353654AbhJAKqN (ORCPT ); Fri, 1 Oct 2021 06:46:13 -0400 Received: from foss.arm.com ([217.140.110.172]:40090 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352862AbhJAKqK (ORCPT ); Fri, 1 Oct 2021 06:46:10 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88B8D106F; Fri, 1 Oct 2021 03:44:25 -0700 (PDT) Received: from [10.32.36.22] (e121896.Emea.Arm.com [10.32.36.22]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 11F593F70D; Fri, 1 Oct 2021 03:44:22 -0700 (PDT) Subject: Re: [RFC] perf arm-spe: Track task context switch for cpu-mode events To: Stephane Eranian , Namhyung Kim Cc: Leo Yan , Arnaldo Carvalho de Melo , Jiri Olsa , Ingo Molnar , Peter Zijlstra , LKML , Andi Kleen , Ian Rogers , Adrian Hunter References: <20210916001748.1525291-1-namhyung@kernel.org> <20210916135418.GA383600@leoy-ThinkPad-X240s> <20210923142305.GA603008@leoy-ThinkPad-X240s> From: James Clark Message-ID: <8cc1574a-29a9-f550-0b09-a23ce69467d3@arm.com> Date: Fri, 1 Oct 2021 11:44:21 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30/09/2021 19:47, Stephane Eranian wrote: > On Thu, Sep 23, 2021 at 9:02 AM Namhyung Kim wrote: >> >> Hi Leo, >> >> On Thu, Sep 23, 2021 at 7:23 AM Leo Yan wrote: >>> >>> Hi Namhyung, >>> >>> On Thu, Sep 16, 2021 at 02:01:21PM -0700, Namhyung Kim wrote: >>> >>> [...] >>> >>>>> Before we had discussion for enabling PID/TID for SPE samples; in the patch >>>>> set [1], patches 07, 08 set sample's pid/tid based on the Arm SPE context >>>>> packets. To enable hardware tracing context ID, you also needs to enable >>>>> kernel config CONFIG_PID_IN_CONTEXTIDR. >>>> >>>> Thanks for sharing this. >>>> >>>> Yeah I also look at the context info but having a dependency on a kconfig >>>> looks limiting its functionality. Also the kconfig says it has some overhead >>>> in the critical path (even if perf is not running, right?) - but not sure how >>>> much it can add. >>> >>> Yes, after enabled config PID_IN_CONTEXTIDR, the kernel will always >>> write PID into the system register CONTEXTIDR during process context >>> switching. Please see the flow: >>> >>> __switch_to() (arch/arm64/kernel/process.c) >>> `-> contextidr_thread_switch(next) >> >> Thanks for the info. I assume it's a light-weight operation. >> >> > I'd like to understand why it was believed that having SPE record to > PID could be too expensive > vs. what I am seeing with all the tracking of context switches and the > volume of data this generates. > I think the justification about it being expensive is that when PID_IN_CONTEXTIDR is set, there is an extra few instructions to write that value on every context switch, whether SPE is enabled or not. So it has a system wide impact.