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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@somainline.org>
To: Rob Herring <robh@kernel.org>
Cc: viresh.kumar@linaro.org, bjorn.andersson@linaro.org,
	agross@kernel.org, rjw@rjwysocki.net, devicetree@vger.kernel.org,
	amit.kucheria@linaro.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org,
	konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
	martin.botka@somainline.org, jeffrey.l.hugo@gmail.com
Subject: Re: [PATCH v5 7/7] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998
Date: Fri, 5 Feb 2021 23:23:13 +0100	[thread overview]
Message-ID: <8e7efd35-791c-da49-c9db-bc8a94021c42@somainline.org> (raw)
In-Reply-To: <20210205215125.GA3810714@robh.at.kernel.org>

Il 05/02/21 22:51, Rob Herring ha scritto:
> On Thu, Jan 21, 2021 at 08:52:50PM +0100, AngeloGioacchino Del Regno wrote:
>> The OSM programming addition has been done under the
>> qcom,cpufreq-hw-8998 compatible name: specify the requirement
>> of two additional register spaces for this functionality.
>> This implementation, with the same compatible, has been
>> tested on MSM8998 and SDM630.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
>> ---
>>   .../bindings/cpufreq/cpufreq-qcom-hw.yaml     | 66 +++++++++++++++----
>>   1 file changed, 52 insertions(+), 14 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
>> index bc81b6203e27..17fd6a6cefb0 100644
>> --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
>> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
>> @@ -18,6 +18,10 @@ description: |
>>   properties:
>>     compatible:
>>       oneOf:
>> +      - description: Non-secure v1 of CPUFREQ HW
>> +        items:
>> +          - const: qcom,cpufreq-hw-8998
>> +
>>         - description: v1 of CPUFREQ HW
>>           items:
>>             - const: qcom,cpufreq-hw
>> @@ -28,21 +32,9 @@ properties:
>>                 - qcom,sm8250-cpufreq-epss
>>             - const: qcom,cpufreq-epss
>>   
>> -  reg:
>> -    minItems: 2
>> -    maxItems: 3
>> -    items:
>> -      - description: Frequency domain 0 register region
>> -      - description: Frequency domain 1 register region
>> -      - description: Frequency domain 2 register region
>> +  reg: {}
>>   
>> -  reg-names:
>> -    minItems: 2
>> -    maxItems: 3
>> -    items:
>> -      - const: freq-domain0
>> -      - const: freq-domain1
>> -      - const: freq-domain2
>> +  reg-names: {}
>>   
>>     clocks:
>>       items:
>> @@ -57,6 +49,52 @@ properties:
>>     '#freq-domain-cells':
>>       const: 1
>>   
>> +if:
>> +  properties:
>> +    compatible:
>> +      contains:
>> +        const: qcom,cpufreq-hw-8998
>> +then:
>> +  properties:
>> +    reg:
>> +      minItems: 2
>> +      maxItems: 6
>> +      items:
>> +        - description: Frequency domain 0 register region
>> +        - description: Operating State Manager domain 0 register region
>> +        - description: Frequency domain 1 register region
>> +        - description: Operating State Manager domain 1 register region
>> +        - description: PLL ACD domain 0 register region (if ACD programming required)
>> +        - description: PLL ACD domain 1 register region (if ACD programming required)
>> +
>> +    reg-names:
>> +      minItems: 2
>> +      maxItems: 6
>> +      items:
>> +        - const: "osm-domain0"
>> +        - const: "freq-domain0"
>> +        - const: "osm-domain1"
>> +        - const: "freq-domain1"
>> +        - const: "osm-acd0"
>> +        - const: "osm-acd1"
> 
> Don't need quotes.
> 

Ack

>> +
>> +else:
>> +  properties:
>> +    reg:
>> +      minItems: 2
>> +      maxItems: 3
>> +      items:
>> +        - description: Frequency domain 0 register region
>> +        - description: Frequency domain 1 register region
>> +        - description: Frequency domain 2 register region
>> +    reg-names:
>> +      minItems: 2
>> +      maxItems: 3
>> +      items:
>> +        - const: "freq-domain0"
>> +        - const: "freq-domain1"
>> +        - const: "freq-domain2"
>> +
>>   required:
>>     - compatible
>>     - reg
>> -- 
>> 2.30.0
>>


  reply	other threads:[~2021-02-06  3:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-21 19:52 [PATCH v5 0/7] cpufreq-qcom-hw: Implement full OSM programming AngeloGioacchino Del Regno
2021-01-21 19:52 ` [PATCH v5 1/7] cpufreq: blacklist SDM630/636/660 in cpufreq-dt-platdev AngeloGioacchino Del Regno
2021-01-21 19:52 ` [PATCH v5 2/7] cpufreq: blacklist MSM8998 " AngeloGioacchino Del Regno
2021-01-21 19:52 ` [PATCH v5 3/7] dt-bindings: arm: cpus: Document 'qcom,freq-domain' property AngeloGioacchino Del Regno
2021-02-05 21:46   ` Rob Herring
2021-02-05 22:22     ` AngeloGioacchino Del Regno
2021-01-21 19:52 ` [PATCH v5 4/7] dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindings AngeloGioacchino Del Regno
2021-01-21 19:52 ` [PATCH v5 5/7] cpufreq: qcom-hw: Implement CPRh aware OSM programming AngeloGioacchino Del Regno
2021-01-21 19:52 ` [PATCH v5 6/7] cpufreq: qcom-hw: Allow getting the maximum transition latency for OPPs AngeloGioacchino Del Regno
2021-01-21 19:52 ` [PATCH v5 7/7] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998 AngeloGioacchino Del Regno
2021-02-05 21:51   ` Rob Herring
2021-02-05 22:23     ` AngeloGioacchino Del Regno [this message]
2021-01-22  9:46 ` [PATCH v5 0/7] cpufreq-qcom-hw: Implement full OSM programming Viresh Kumar
2021-01-22 23:43   ` AngeloGioacchino Del Regno

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