* [PATCH V1 0/3] Add LLCC support for SM8150 SoC
@ 2020-09-30 8:14 Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 1/3] dt-bindings: msm: Add LLCC for SM8150 Souradeep Chowdhury
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Souradeep Chowdhury @ 2020-09-30 8:14 UTC (permalink / raw)
To: devicetree, Andy Gross, Bjorn Andersson
Cc: linux-arm-msm, linux-kernel, Rajendra Nayak, Souradeep Chowdhury
LLCC behaviour is controlled by the configuration data set
in the llcc-qcom driver, add the same for SM8150 SoC.
Add the compatible for SM8150 SoC
Souradeep Chowdhury (3):
dt-bindings: msm: Add LLCC for SM8150
soc: qcom: llcc: Add configuration data for SM8150
arm64: dts: qcom: sm8150: Add LLC support for sm8150
.../bindings/arm/msm/qcom,llcc.yaml | 1 +
arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 +++++-
drivers/soc/qcom/llcc-qcom.c | 30 +++++++++++++++++++
include/linux/soc/qcom/llcc-qcom.h | 6 ++++
4 files changed, 45 insertions(+), 1 deletion(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH V1 1/3] dt-bindings: msm: Add LLCC for SM8150
2020-09-30 8:14 [PATCH V1 0/3] Add LLCC support for SM8150 SoC Souradeep Chowdhury
@ 2020-09-30 8:14 ` Souradeep Chowdhury
2020-10-06 19:11 ` Rob Herring
2020-09-30 8:14 ` [PATCH V1 2/3] soc: qcom: llcc: Add configuration data " Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 3/3] arm64: dts: qcom: sm8150: Add LLC support for sm8150 Souradeep Chowdhury
2 siblings, 1 reply; 6+ messages in thread
From: Souradeep Chowdhury @ 2020-09-30 8:14 UTC (permalink / raw)
To: devicetree, Andy Gross, Bjorn Andersson
Cc: linux-arm-msm, linux-kernel, Rajendra Nayak, Souradeep Chowdhury
Add LLCC compatible for SM8150 SoC.
Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
---
Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
index c3a8604dfa80..0a9889debc7c 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
@@ -23,6 +23,7 @@ properties:
enum:
- qcom,sc7180-llcc
- qcom,sdm845-llcc
+ - qcom,sm8150-llcc
reg:
items:
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH V1 2/3] soc: qcom: llcc: Add configuration data for SM8150
2020-09-30 8:14 [PATCH V1 0/3] Add LLCC support for SM8150 SoC Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 1/3] dt-bindings: msm: Add LLCC for SM8150 Souradeep Chowdhury
@ 2020-09-30 8:14 ` Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 3/3] arm64: dts: qcom: sm8150: Add LLC support for sm8150 Souradeep Chowdhury
2 siblings, 0 replies; 6+ messages in thread
From: Souradeep Chowdhury @ 2020-09-30 8:14 UTC (permalink / raw)
To: devicetree, Andy Gross, Bjorn Andersson
Cc: linux-arm-msm, linux-kernel, Rajendra Nayak, Souradeep Chowdhury
Add LLCC configuration data for SM8150 SoC which controls
LLCC behaviour.
Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
---
drivers/soc/qcom/llcc-qcom.c | 30 ++++++++++++++++++++++++++++++
include/linux/soc/qcom/llcc-qcom.h | 6 ++++++
2 files changed, 36 insertions(+)
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index 70fbe70c6213..8b245006e33e 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -119,6 +119,30 @@ static const struct llcc_slice_config sdm845_data[] = {
{ LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0 },
};
+static const struct llcc_slice_config sm8150_data[] = {
+ { LLCC_CPUSS, 1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 1 },
+ { LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_VIDSC1, 3, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_AUDIO, 6, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_MDMHPGRW, 7, 3072, 1, 0, 0xFF, 0xF00, 0, 0, 0, 1, 0 },
+ { LLCC_MDM, 8, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_MODHW, 9, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_CMPT, 10, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_GPUHTW , 11, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_GPU, 12, 2560, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_MMUHWT, 13, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1 },
+ { LLCC_CMPTDMA, 15, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_DISP, 16, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_MDMHPFX, 21, 1024, 0, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_NPU, 23, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_WLHW, 24, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_MODPE, 29, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
+ { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 },
+ { LLCC_WRCACHE, 31, 128, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0 },
+};
+
static const struct qcom_llcc_config sc7180_cfg = {
.sct_data = sc7180_data,
.size = ARRAY_SIZE(sc7180_data),
@@ -129,6 +153,11 @@ static const struct qcom_llcc_config sdm845_cfg = {
.size = ARRAY_SIZE(sdm845_data),
};
+static const struct qcom_llcc_config sm8150_cfg = {
+ .sct_data = sm8150_data,
+ .size = ARRAY_SIZE(sm8150_data),
+};
+
static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
/**
@@ -494,6 +523,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
static const struct of_device_id qcom_llcc_of_match[] = {
{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfg },
{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg },
+ { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },
{ }
};
diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
index 90b864655822..3db6797ba6ff 100644
--- a/include/linux/soc/qcom/llcc-qcom.h
+++ b/include/linux/soc/qcom/llcc-qcom.h
@@ -16,6 +16,7 @@
#define LLCC_AUDIO 6
#define LLCC_MDMHPGRW 7
#define LLCC_MDM 8
+#define LLCC_MODHW 9
#define LLCC_CMPT 10
#define LLCC_GPUHTW 11
#define LLCC_GPU 12
@@ -26,6 +27,11 @@
#define LLCC_MDMHPFX 20
#define LLCC_MDMPNG 21
#define LLCC_AUDHW 22
+#define LLCC_NPU 23
+#define LLCC_WLHW 24
+#define LLCC_MODPE 29
+#define LLCC_APTCM 30
+#define LLCC_WRCACHE 31
/**
* llcc_slice_desc - Cache slice descriptor
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH V1 3/3] arm64: dts: qcom: sm8150: Add LLC support for sm8150
2020-09-30 8:14 [PATCH V1 0/3] Add LLCC support for SM8150 SoC Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 1/3] dt-bindings: msm: Add LLCC for SM8150 Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 2/3] soc: qcom: llcc: Add configuration data " Souradeep Chowdhury
@ 2020-09-30 8:14 ` Souradeep Chowdhury
2020-11-20 4:24 ` Bjorn Andersson
2 siblings, 1 reply; 6+ messages in thread
From: Souradeep Chowdhury @ 2020-09-30 8:14 UTC (permalink / raw)
To: devicetree, Andy Gross, Bjorn Andersson
Cc: linux-arm-msm, linux-kernel, Rajendra Nayak, Souradeep Chowdhury
Add LLCC system cache controller entry for sm8150 to support sm8150
for LLCC.
Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index f0a872e02686..71037a1bb217 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -490,7 +490,14 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
- ufs_mem_hc: ufshc@1d84000 {
+ system-cache-controller@9200000 {
+ compatible = "qcom,sm8150-llcc";
+ reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>;
+ reg-names = "llcc_base", "llcc_broadcast_base";
+ interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ ufs_mem_hc: ufshc@1d84000 {
compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
"jedec,ufs-2.0";
reg = <0 0x01d84000 0 0x2500>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH V1 1/3] dt-bindings: msm: Add LLCC for SM8150
2020-09-30 8:14 ` [PATCH V1 1/3] dt-bindings: msm: Add LLCC for SM8150 Souradeep Chowdhury
@ 2020-10-06 19:11 ` Rob Herring
0 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2020-10-06 19:11 UTC (permalink / raw)
To: Souradeep Chowdhury
Cc: linux-kernel, devicetree, Bjorn Andersson, linux-arm-msm,
Andy Gross, Rajendra Nayak
On Wed, 30 Sep 2020 13:44:12 +0530, Souradeep Chowdhury wrote:
> Add LLCC compatible for SM8150 SoC.
>
> Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
> ---
> Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH V1 3/3] arm64: dts: qcom: sm8150: Add LLC support for sm8150
2020-09-30 8:14 ` [PATCH V1 3/3] arm64: dts: qcom: sm8150: Add LLC support for sm8150 Souradeep Chowdhury
@ 2020-11-20 4:24 ` Bjorn Andersson
0 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2020-11-20 4:24 UTC (permalink / raw)
To: Souradeep Chowdhury
Cc: devicetree, Andy Gross, linux-arm-msm, linux-kernel, Rajendra Nayak
On Wed 30 Sep 03:14 CDT 2020, Souradeep Chowdhury wrote:
> Add LLCC system cache controller entry for sm8150 to support sm8150
> for LLCC.
>
Thank you for your patches Souradeep, unfortunately there where some
indentation issues that you would have seen if you ran
./scripts/checkpatch.pl --strict.
I fixed these issues up and applied the patches towards v5.11.
Thank you,
Bjorn
> Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index f0a872e02686..71037a1bb217 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -490,7 +490,14 @@
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> - ufs_mem_hc: ufshc@1d84000 {
> + system-cache-controller@9200000 {
> + compatible = "qcom,sm8150-llcc";
> + reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>;
> + reg-names = "llcc_base", "llcc_broadcast_base";
> + interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + ufs_mem_hc: ufshc@1d84000 {
> compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
> "jedec,ufs-2.0";
> reg = <0 0x01d84000 0 0x2500>;
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-11-20 4:25 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2020-09-30 8:14 [PATCH V1 0/3] Add LLCC support for SM8150 SoC Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 1/3] dt-bindings: msm: Add LLCC for SM8150 Souradeep Chowdhury
2020-10-06 19:11 ` Rob Herring
2020-09-30 8:14 ` [PATCH V1 2/3] soc: qcom: llcc: Add configuration data " Souradeep Chowdhury
2020-09-30 8:14 ` [PATCH V1 3/3] arm64: dts: qcom: sm8150: Add LLC support for sm8150 Souradeep Chowdhury
2020-11-20 4:24 ` Bjorn Andersson
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