From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DB88C46469 for ; Wed, 12 Sep 2018 11:11:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1A23720882 for ; Wed, 12 Sep 2018 11:11:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1A23720882 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728054AbeILQPW (ORCPT ); Wed, 12 Sep 2018 12:15:22 -0400 Received: from foss.arm.com ([217.140.101.70]:57670 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727673AbeILQPV (ORCPT ); Wed, 12 Sep 2018 12:15:21 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EC6217A9; Wed, 12 Sep 2018 04:11:18 -0700 (PDT) Received: from [10.4.13.92] (e112298-lin.Emea.Arm.com [10.4.13.92]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4B0B13F614; Wed, 12 Sep 2018 04:11:17 -0700 (PDT) Subject: Re: [PATCH v5 05/27] arm64: Use daifflag_restore after bp_hardening To: James Morse Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, catalin.marinas@arm.com, will.deacon@arm.com References: <1535471497-38854-1-git-send-email-julien.thierry@arm.com> <1535471497-38854-6-git-send-email-julien.thierry@arm.com> <641119b9-3466-817d-3d6b-dd710c646b49@arm.com> From: Julien Thierry Message-ID: <8f200315-1db9-1905-71ae-cb4269450b7c@arm.com> Date: Wed, 12 Sep 2018 12:11:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <641119b9-3466-817d-3d6b-dd710c646b49@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi James, On 12/09/18 11:32, James Morse wrote: > Hi Julien, > > On 28/08/18 16:51, Julien Thierry wrote: >> For EL0 entries requiring bp_hardening, daif status is kept at >> DAIF_PROCCTX_NOIRQ until after hardening has been done. Then interrupts >> are enabled through local_irq_enable(). >> >> Before using local_irq_* functions, daifflags should be properly restored >> to a state where IRQs are enabled. > >> Enable IRQs by restoring DAIF_PROCCTX state after bp hardening. > > Is this just for symmetry, or are you going on to add something to the daifflags > state that local_irq_* functions won't change? (if so, could you allude to that > in the commit message) > What happens is that once we use ICC_PMR_EL1, local_irq_enable will not touch PSR.I. And we are coming back from an entry where PSR.I was kept to 1 so local_irq_enable was not actually enabling the interrupts. On the otherhand, restore will affect both. Another option is to have the asm macro "enable_da_f" also switch to PMR usage (i.e. "just keep normal interrupts disabled"). Overall it would probably be easier to reason with, but I'm just unsure whether it is acceptable to receive a Pseudo NMI before having applied the bp_hardening. If it is possible, I'm happy to solve this with enable_da_f. Thanks, > > Either way, > > Acked-by: James Morse > -- Julien Thierry