From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v2 17/45] powerpc/mm: PTE_ATOMIC_UPDATES is only for 40x
Date: Wed, 6 May 2020 16:48:22 +0000 (UTC) [thread overview]
Message-ID: <91bbbf5df8ec16cbc0e21a4cbbe239fdbcb4993c.1588783498.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1588783498.git.christophe.leroy@csgroup.eu>
Only 40x still uses PTE_ATOMIC_UPDATES.
40x cannot not select CONFIG_PTE64_BIT.
Drop handling of PTE_ATOMIC_UPDATES:
- In nohash/64
- In nohash/32 for CONFIG_PTE_64BIT
Keep PTE_ATOMIC_UPDATES only for nohash/32 for !CONFIG_PTE_64BIT
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/include/asm/nohash/32/pgtable.h | 17 ------------
arch/powerpc/include/asm/nohash/64/pgtable.h | 28 +-------------------
2 files changed, 1 insertion(+), 44 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index b04ba257fddb..523c4c3876c5 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -262,25 +262,8 @@ static inline unsigned long long pte_update(pte_t *p,
unsigned long clr,
unsigned long set)
{
-#ifdef PTE_ATOMIC_UPDATES
- unsigned long long old;
- unsigned long tmp;
-
- __asm__ __volatile__("\
-1: lwarx %L0,0,%4\n\
- lwzx %0,0,%3\n\
- andc %1,%L0,%5\n\
- or %1,%1,%6\n"
- PPC405_ERR77(0,%3)
-" stwcx. %1,0,%4\n\
- bne- 1b"
- : "=&r" (old), "=&r" (tmp), "=m" (*p)
- : "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p)
- : "cc" );
-#else /* PTE_ATOMIC_UPDATES */
unsigned long long old = pte_val(*p);
*p = __pte((old & ~(unsigned long long)clr) | set);
-#endif /* !PTE_ATOMIC_UPDATES */
#ifdef CONFIG_44x
if ((old & _PAGE_USER) && (old & _PAGE_EXEC))
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h
index 9a33b8bd842d..9c703b140d64 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable.h
@@ -211,22 +211,9 @@ static inline unsigned long pte_update(struct mm_struct *mm,
unsigned long set,
int huge)
{
-#ifdef PTE_ATOMIC_UPDATES
- unsigned long old, tmp;
-
- __asm__ __volatile__(
- "1: ldarx %0,0,%3 # pte_update\n\
- andc %1,%0,%4 \n\
- or %1,%1,%6\n\
- stdcx. %1,0,%3 \n\
- bne- 1b"
- : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
- : "r" (ptep), "r" (clr), "m" (*ptep), "r" (set)
- : "cc" );
-#else
unsigned long old = pte_val(*ptep);
*ptep = __pte((old & ~clr) | set);
-#endif
+
/* huge pages use the old page table lock */
if (!huge)
assert_pte_locked(mm, addr);
@@ -310,21 +297,8 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
unsigned long bits = pte_val(entry) &
(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
-#ifdef PTE_ATOMIC_UPDATES
- unsigned long old, tmp;
-
- __asm__ __volatile__(
- "1: ldarx %0,0,%4\n\
- or %0,%3,%0\n\
- stdcx. %0,0,%4\n\
- bne- 1b"
- :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
- :"r" (bits), "r" (ptep), "m" (*ptep)
- :"cc");
-#else
unsigned long old = pte_val(*ptep);
*ptep = __pte(old | bits);
-#endif
flush_tlb_page(vma, address);
}
--
2.25.0
next prev parent reply other threads:[~2020-05-06 16:50 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-06 16:48 [PATCH v2 00/45] Use hugepages to map kernel mem on 8xx Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 01/45] powerpc/kasan: Fix error detection on memory allocation Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 02/45] powerpc/kasan: Fix issues by lowering KASAN_SHADOW_END Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 03/45] powerpc/kasan: Fix shadow pages allocation failure Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 04/45] powerpc/kasan: Remove unnecessary page table locking Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 05/45] powerpc/kasan: Refactor update of early shadow mappings Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 06/45] powerpc/kasan: Declare kasan_init_region() weak Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 07/45] powerpc/ptdump: Limit size of flags text to 1/2 chars on PPC32 Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 08/45] powerpc/ptdump: Reorder flags Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 09/45] powerpc/ptdump: Add _PAGE_COHERENT flag Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 10/45] powerpc/ptdump: Display size of BATs Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 11/45] powerpc/ptdump: Standardise display of BAT flags Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 12/45] powerpc/ptdump: Properly handle non standard page size Christophe Leroy
2020-05-07 16:12 ` kbuild test robot
2020-05-06 16:48 ` [PATCH v2 13/45] powerpc/ptdump: Handle hugepd at PGD level Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 14/45] powerpc/32s: Don't warn when mapping RO data ROX Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 15/45] powerpc/mm: Allocate static page tables for fixmap Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 16/45] powerpc/mm: Fix conditions to perform MMU specific management by blocks on PPC32 Christophe Leroy
2020-05-06 16:48 ` Christophe Leroy [this message]
2020-05-06 16:48 ` [PATCH v2 18/45] powerpc/mm: Refactor pte_update() on nohash/32 Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 19/45] powerpc/mm: Refactor pte_update() on book3s/32 Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 20/45] powerpc/mm: Standardise __ptep_test_and_clear_young() params between PPC32 and PPC64 Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 21/45] powerpc/mm: Standardise pte_update() prototype " Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 22/45] powerpc/mm: Create a dedicated pte_update() for 8xx Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 23/45] powerpc/mm: Reduce hugepd size for 8M hugepages on 8xx Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 24/45] powerpc/8xx: Drop CONFIG_8xx_COPYBACK option Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 25/45] powerpc/8xx: Prepare handlers for _PAGE_HUGE for 512k pages Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 26/45] powerpc/8xx: Manage 512k huge pages as standard pages Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 27/45] powerpc/8xx: Only 8M pages are hugepte pages now Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 28/45] powerpc/8xx: MM_SLICE is not needed anymore Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 29/45] powerpc/8xx: Move PPC_PIN_TLB options into 8xx Kconfig Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 30/45] powerpc/8xx: Add function to set pinned TLBs Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 31/45] powerpc/8xx: Don't set IMMR map anymore at boot Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 32/45] powerpc/8xx: Always pin TLBs at startup Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 33/45] powerpc/8xx: Drop special handling of Linear and IMMR mappings in I/D TLB handlers Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 34/45] powerpc/8xx: Remove now unused TLB miss functions Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 35/45] powerpc/8xx: Move DTLB perf handling closer Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 36/45] powerpc/mm: Don't be too strict with _etext alignment on PPC32 Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 37/45] powerpc/8xx: Refactor kernel address boundary comparison Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 38/45] powerpc/8xx: Add a function to early map kernel via huge pages Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 39/45] powerpc/8xx: Map IMMR with a huge page Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 40/45] powerpc/8xx: Map linear memory with huge pages Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 41/45] powerpc/8xx: Allow STRICT_KERNEL_RwX with pinned TLB Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 42/45] powerpc/8xx: Allow large TLBs with DEBUG_PAGEALLOC Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 43/45] powerpc/8xx: Implement dedicated kasan_init_region() Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 44/45] powerpc/32s: Allow mapping with BATs with DEBUG_PAGEALLOC Christophe Leroy
2020-05-06 16:48 ` [PATCH v2 45/45] powerpc/32s: Implement dedicated kasan_init_region() Christophe Leroy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=91bbbf5df8ec16cbc0e21a4cbbe239fdbcb4993c.1588783498.git.christophe.leroy@csgroup.eu \
--to=christophe.leroy@csgroup.eu \
--cc=benh@kernel.crashing.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mpe@ellerman.id.au \
--cc=paulus@samba.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).