Re: [RFC PATCH v2 08/12] x86/tlb: Privatize cpu_tlbstate

[Andy Lutomirski <luto@amacapital.net>]

> On May 30, 2019, at 11:36 PM, Nadav Amit <namit@vmware.com> wrote:
> 
> cpu_tlbstate is mostly private and only the variable is_lazy is shared.
> This causes some false-sharing when TLB flushes are performed.
> 
> Break cpu_tlbstate intro cpu_tlbstate and cpu_tlbstate_shared, and mark
> each one accordingly.
> 

At some point we’ll want to do a better job with our PV flush code, and I suspect we’ll end up with more of this shared again.

> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Signed-off-by: Nadav Amit <namit@vmware.com>
> ---
> arch/x86/include/asm/tlbflush.h | 40 ++++++++++++++++++---------------
> arch/x86/mm/init.c              |  2 +-
> arch/x86/mm/tlb.c               | 15 ++++++++-----
> 3 files changed, 32 insertions(+), 25 deletions(-)
> 
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index 79272938cf79..a1fea36d5292 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -178,23 +178,6 @@ struct tlb_state {
>    u16 loaded_mm_asid;
>    u16 next_asid;
> 
> -    /*
> -     * We can be in one of several states:
> -     *
> -     *  - Actively using an mm.  Our CPU's bit will be set in
> -     *    mm_cpumask(loaded_mm) and is_lazy == false;
> -     *
> -     *  - Not using a real mm.  loaded_mm == &init_mm.  Our CPU's bit
> -     *    will not be set in mm_cpumask(&init_mm) and is_lazy == false.
> -     *
> -     *  - Lazily using a real mm.  loaded_mm != &init_mm, our bit
> -     *    is set in mm_cpumask(loaded_mm), but is_lazy == true.
> -     *    We're heuristically guessing that the CR3 load we
> -     *    skipped more than makes up for the overhead added by
> -     *    lazy mode.
> -     */
> -    bool is_lazy;
> -
>    /*
>     * If set we changed the page tables in such a way that we
>     * needed an invalidation of all contexts (aka. PCIDs / ASIDs).
> @@ -240,7 +223,27 @@ struct tlb_state {
>     */
>    struct tlb_context ctxs[TLB_NR_DYN_ASIDS];
> };
> -DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
> +DECLARE_PER_CPU_ALIGNED(struct tlb_state, cpu_tlbstate);
> +
> +struct tlb_state_shared {
> +    /*
> +     * We can be in one of several states:
> +     *
> +     *  - Actively using an mm.  Our CPU's bit will be set in
> +     *    mm_cpumask(loaded_mm) and is_lazy == false;
> +     *
> +     *  - Not using a real mm.  loaded_mm == &init_mm.  Our CPU's bit
> +     *    will not be set in mm_cpumask(&init_mm) and is_lazy == false.
> +     *
> +     *  - Lazily using a real mm.  loaded_mm != &init_mm, our bit
> +     *    is set in mm_cpumask(loaded_mm), but is_lazy == true.
> +     *    We're heuristically guessing that the CR3 load we
> +     *    skipped more than makes up for the overhead added by
> +     *    lazy mode.
> +     */
> +    bool is_lazy;
> +};
> +DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state_shared, cpu_tlbstate_shared);
> 
> /*
>  * Blindly accessing user memory from NMI context can be dangerous
> @@ -439,6 +442,7 @@ static inline void __native_flush_tlb_one_user(unsigned long addr)
> {
>    u32 loaded_mm_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
> 
> +    //invpcid_flush_one(kern_pcid(loaded_mm_asid), addr);
>    asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
> 
>    if (!static_cpu_has(X86_FEATURE_PTI))
> diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
> index fd10d91a6115..34027f36a944 100644
> --- a/arch/x86/mm/init.c
> +++ b/arch/x86/mm/init.c
> @@ -951,7 +951,7 @@ void __init zone_sizes_init(void)
>    free_area_init_nodes(max_zone_pfns);
> }
> 
> -__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
> +__visible DEFINE_PER_CPU_ALIGNED(struct tlb_state, cpu_tlbstate) = {
>    .loaded_mm = &init_mm,
>    .next_asid = 1,
>    .cr4 = ~0UL,    /* fail hard if we screw up cr4 shadow initialization */
> diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
> index b0c3065aad5d..755b2bb3e5b6 100644
> --- a/arch/x86/mm/tlb.c
> +++ b/arch/x86/mm/tlb.c
> @@ -144,7 +144,7 @@ void leave_mm(int cpu)
>        return;
> 
>    /* Warn if we're not lazy. */
> -    WARN_ON(!this_cpu_read(cpu_tlbstate.is_lazy));
> +    WARN_ON(!this_cpu_read(cpu_tlbstate_shared.is_lazy));
> 
>    switch_mm(NULL, &init_mm, NULL);
> }
> @@ -276,7 +276,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
> {
>    struct mm_struct *real_prev = this_cpu_read(cpu_tlbstate.loaded_mm);
>    u16 prev_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
> -    bool was_lazy = this_cpu_read(cpu_tlbstate.is_lazy);
> +    bool was_lazy = this_cpu_read(cpu_tlbstate_shared.is_lazy);
>    unsigned cpu = smp_processor_id();
>    u64 next_tlb_gen;
>    bool need_flush;
> @@ -321,7 +321,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
>        __flush_tlb_all();
>    }
> #endif
> -    this_cpu_write(cpu_tlbstate.is_lazy, false);
> +    this_cpu_write(cpu_tlbstate_shared.is_lazy, false);
> 
>    /*
>     * The membarrier system call requires a full memory barrier and
> @@ -462,7 +462,7 @@ void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
>    if (this_cpu_read(cpu_tlbstate.loaded_mm) == &init_mm)
>        return;
> 
> -    this_cpu_write(cpu_tlbstate.is_lazy, true);
> +    this_cpu_write(cpu_tlbstate_shared.is_lazy, true);
> }
> 
> /*
> @@ -543,7 +543,7 @@ static void flush_tlb_func_common(const struct flush_tlb_info *f,
>    VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].ctx_id) !=
>           loaded_mm->context.ctx_id);
> 
> -    if (this_cpu_read(cpu_tlbstate.is_lazy)) {
> +    if (this_cpu_read(cpu_tlbstate_shared.is_lazy)) {
>        /*
>         * We're in lazy mode.  We need to at least flush our
>         * paging-structure cache to avoid speculatively reading
> @@ -659,11 +659,14 @@ static void flush_tlb_func_remote(void *info)
> 
> static inline bool tlb_is_not_lazy(int cpu)
> {
> -    return !per_cpu(cpu_tlbstate.is_lazy, cpu);
> +    return !per_cpu(cpu_tlbstate_shared.is_lazy, cpu);
> }
> 
> static DEFINE_PER_CPU(cpumask_t, flush_tlb_mask);
> 
> +DEFINE_PER_CPU_ALIGNED(struct tlb_state_shared, cpu_tlbstate_shared);
> +EXPORT_PER_CPU_SYMBOL(cpu_tlbstate_shared);
> +
> void native_flush_tlb_multi(const struct cpumask *cpumask,
>                const struct flush_tlb_info *info)
> {
> -- 
> 2.20.1
>