From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751202AbdEaRXR (ORCPT ); Wed, 31 May 2017 13:23:17 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:9837 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751037AbdEaRXB (ORCPT ); Wed, 31 May 2017 13:23:01 -0400 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 31 May 2017 10:23:00 -0700 Subject: Re: [PATCH v6 4/6] vfio: Define vfio based vgpu's dma-buf operations To: "Chen, Xiaoguang" , Gerd Hoffmann , "alex.williamson@redhat.com" , "chris@chris-wilson.co.uk" , "intel-gfx@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "zhenyuw@linux.intel.com" , "Lv, Zhiyuan" , "intel-gvt-dev@lists.freedesktop.org" , "Wang, Zhi A" , "Tian, Kevin" References: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com> <1495874332-2851-5-git-send-email-xiaoguang.chen@intel.com> <1496042420.21582.3.camel@redhat.com> X-Nvconfidentiality: public From: Kirti Wankhede Message-ID: <93758f79-8076-9644-a8a7-6e2ebfd91fee@nvidia.com> Date: Wed, 31 May 2017 22:52:50 +0530 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [10.24.71.247] X-ClientProxiedBy: BGMAIL102.nvidia.com (10.25.59.11) To bgmail102.nvidia.com (10.25.59.11) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/31/2017 11:48 AM, Chen, Xiaoguang wrote: > Hi, > >> -----Original Message----- >> From: Gerd Hoffmann [mailto:kraxel@redhat.com] >> Sent: Monday, May 29, 2017 3:20 PM >> To: Chen, Xiaoguang ; >> alex.williamson@redhat.com; chris@chris-wilson.co.uk; intel- >> gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; >> zhenyuw@linux.intel.com; Lv, Zhiyuan ; intel-gvt- >> dev@lists.freedesktop.org; Wang, Zhi A ; Tian, Kevin >> >> Subject: Re: [PATCH v6 4/6] vfio: Define vfio based vgpu's dma-buf operations >> >>> +struct vfio_vgpu_dmabuf_info { >>> + __u32 argsz; >>> + __u32 flags; >>> + struct vfio_vgpu_plane_info plane_info; >>> + __s32 fd; >>> + __u32 pad; >>> +}; >> >> Hmm, now you have argsz and flags twice in vfio_vgpu_dmabuf_info ... >> >> I think we should have something like this: >> >> struct vfio_vgpu_plane_info { >> __u64 start; >> __u64 drm_format_mod; >> __u32 drm_format; >> __u32 width; >> __u32 height; >> __u32 stride; >> __u32 size; >> __u32 x_pos; >> __u32 y_pos; >> __u32 padding; >> }; >> >> struct vfio_vgpu_query_plane { >> __u32 argsz; >> __u32 flags; >> struct vfio_vgpu_plane_info plane_info; >> __u32 plane_id; >> __u32 padding; >> }; >> >> struct vfio_vgpu_create_dmabuf { >> __u32 argsz; >> __u32 flags; >> struct vfio_vgpu_plane_info plane_info; >> __u32 plane_id; >> __s32 fd; >> }; > Good suggestion will apply in the next version. > Thanks for review :) > Can you define what are the expected values of 'flags' would be? Thanks, Kirti > Chenxg. >