linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
@ 2017-04-05 11:03 Maciej S. Szmigiero
  2017-04-05 13:36 ` Jarkko Sakkinen
  2017-04-06  6:18 ` Paul Menzel
  0 siblings, 2 replies; 20+ messages in thread
From: Maciej S. Szmigiero @ 2017-04-05 11:03 UTC (permalink / raw)
  To: pmenzel; +Cc: jgunthorpe, tpmdd-devel, linux-kernel, GNUtoo

Hi Paul,

> tpm tpm0: Unable to read burstcount
> tpm tpm0: tpm_transmit: tpm_send: error -16
> tpm_tis tpm_tis: Could not get TPM timeouts and durations

This looks like a regression I had on ThinkPad X61S.

You can try with a patch from the following commit
which fixed it for me:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1d70fe9d9c3a4c627f9757cbba5d628687b121c1

It is included in mainline kernel 4.10.2.

Maciej

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-05 11:03 [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot Maciej S. Szmigiero
@ 2017-04-05 13:36 ` Jarkko Sakkinen
  2017-04-06  6:18 ` Paul Menzel
  1 sibling, 0 replies; 20+ messages in thread
From: Jarkko Sakkinen @ 2017-04-05 13:36 UTC (permalink / raw)
  To: Maciej S. Szmigiero; +Cc: pmenzel, tpmdd-devel, linux-kernel, GNUtoo

On Wed, Apr 05, 2017 at 01:03:42PM +0200, Maciej S. Szmigiero wrote:
> Hi Paul,
> 
> > tpm tpm0: Unable to read burstcount
> > tpm tpm0: tpm_transmit: tpm_send: error -16
> > tpm_tis tpm_tis: Could not get TPM timeouts and durations
> 
> This looks like a regression I had on ThinkPad X61S.
> 
> You can try with a patch from the following commit
> which fixed it for me:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1d70fe9d9c3a4c627f9757cbba5d628687b121c1
> 
> It is included in mainline kernel 4.10.2.
> 
> Maciej

Paul, Maciej, thank you. Please keep us updated.

/Jarkko

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-05 11:03 [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot Maciej S. Szmigiero
  2017-04-05 13:36 ` Jarkko Sakkinen
@ 2017-04-06  6:18 ` Paul Menzel
  2017-04-06 11:52   ` Maciej S. Szmigiero
  2017-04-06 16:55   ` Jason Gunthorpe
  1 sibling, 2 replies; 20+ messages in thread
From: Paul Menzel @ 2017-04-06  6:18 UTC (permalink / raw)
  To: Maciej S. Szmigiero; +Cc: jgunthorpe, tpmdd-devel, linux-kernel, GNUtoo

Dear Maciej,


On 2017-04-05 13:03, Maciej S. Szmigiero wrote:

>> tpm tpm0: Unable to read burstcount
>> tpm tpm0: tpm_transmit: tpm_send: error -16
>> tpm_tis tpm_tis: Could not get TPM timeouts and durations
> 
> This looks like a regression I had on ThinkPad X61S.
> 
> You can try with a patch from the following commit
> which fixed it for me:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1d70fe9d9c3a4c627f9757cbba5d628687b121c1
> 
> It is included in mainline kernel 4.10.2.

Indeed, that improves the situation. I still need to pass `force=1` to 
the module to get `/dev/tpm0`. No idea, why it’s not in included in 
Linux 4.9 yet.

```
$ more /proc/version
Linux version 4.11.0-rc5+ (root@d44d03a193d6) (gcc version 6.3.0 
20170321 (Debian 6.3.0-10) ) #2 SMP Tue Apr 4 21:07:08 UTC 2017
$ journalctl -k -o cat | grep tpm
tpm_tis tpm_tis: 1.2 TPM (device-id 0x3202, rev-id 5)
tpm tpm0: Issuing TPM_STARTUP
tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 
10000->10000us B 10000->10000us C 0->752000us D 0->752000us
$ more /sys/class/tpm/tpm0/device/caps
Manufacturer: 0x41544d4c
TCG version: 1.2
Firmware version: 11.5
$ sudo tpm_version
Tspi_Context_Connect failed: 0x00003011 - layer=tsp, code=0011 (17), 
Communication failure
```

So do you have an idea, what “ACPI requirements” changed in the `tpm` 
module since Linux 3.16 to be loaded automatically?


Kind regards,

Paul

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-06  6:18 ` Paul Menzel
@ 2017-04-06 11:52   ` Maciej S. Szmigiero
  2017-04-06 16:55   ` Jason Gunthorpe
  1 sibling, 0 replies; 20+ messages in thread
From: Maciej S. Szmigiero @ 2017-04-06 11:52 UTC (permalink / raw)
  To: Paul Menzel; +Cc: jgunthorpe, tpmdd-devel, linux-kernel, GNUtoo

On 04/06/17 08:18, Paul Menzel wrote:
> Dear Maciej,
> 
> On 2017-04-05 13:03, Maciej S. Szmigiero wrote:
> 
>>> tpm tpm0: Unable to read burstcount
>>> tpm tpm0: tpm_transmit: tpm_send: error -16
>>> tpm_tis tpm_tis: Could not get TPM timeouts and durations
>>
>> This looks like a regression I had on ThinkPad X61S.
>>
>> You can try with a patch from the following commit
>> which fixed it for me:
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1d70fe9d9c3a4c627f9757cbba5d628687b121c1
>>
>> It is included in mainline kernel 4.10.2.
> 
> Indeed, that improves the situation. I still need to pass `force=1` to the module to get `/dev/tpm0`. No idea, why it’s not in included in Linux 4.9 yet.
> 
> ```
> $ more /proc/version
> Linux version 4.11.0-rc5+ (root@d44d03a193d6) (gcc version 6.3.0 20170321 (Debian 6.3.0-10) ) #2 SMP Tue Apr 4 21:07:08 UTC 2017
> $ journalctl -k -o cat | grep tpm
> tpm_tis tpm_tis: 1.2 TPM (device-id 0x3202, rev-id 5)
> tpm tpm0: Issuing TPM_STARTUP
> tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 10000->10000us B 10000->10000us C 0->752000us D 0->752000us
> $ more /sys/class/tpm/tpm0/device/caps
> Manufacturer: 0x41544d4c
> TCG version: 1.2
> Firmware version: 11.5
> $ sudo tpm_version
> Tspi_Context_Connect failed: 0x00003011 - layer=tsp, code=0011 (17), Communication failure
> ```
> 
> So do you have an idea, what “ACPI requirements” changed in the `tpm` module since Linux 3.16 to be loaded automatically?

Unfortunately I can't help here as I am just a normal TPM user who
happened to hit and fix that timeouts regression, but maybe others
on ML will know something more about it.

> Kind regards,
> 
> Paul

Best regards,
Maciej

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-06  6:18 ` Paul Menzel
  2017-04-06 11:52   ` Maciej S. Szmigiero
@ 2017-04-06 16:55   ` Jason Gunthorpe
  2017-04-06 18:26     ` Paul Menzel
                       ` (2 more replies)
  1 sibling, 3 replies; 20+ messages in thread
From: Jason Gunthorpe @ 2017-04-06 16:55 UTC (permalink / raw)
  To: Paul Menzel; +Cc: Maciej S. Szmigiero, tpmdd-devel, linux-kernel, GNUtoo

On Thu, Apr 06, 2017 at 08:18:33AM +0200, Paul Menzel wrote:

> Indeed, that improves the situation. I still need to pass `force=1` to the
> module to get `/dev/tpm0`. No idea, why it’s not in included in Linux 4.9
> yet.

Fair point.. Jarkko - could you forward that patch to -stable?

> $ journalctl -k -o cat | grep tpm
> tpm_tis tpm_tis: 1.2 TPM (device-id 0x3202, rev-id 5)
> tpm tpm0: Issuing TPM_STARTUP
> tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 10000->10000us B
> 10000->10000us C 0->752000us D 0->752000us

There could be more relavent kernel messages than this, try
  grep -i tpm

?

> So do you have an idea, what “ACPI requirements” changed in the `tpm` module
> since Linux 3.16 to be loaded automatically?

We added direct ACPI binding to the driver in addition to PNP, so if
you have an ACPI table it goes down that path and does some additional
validation of what is in the TPM. The BIOS must provide a
acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
minimum.

There are FW_BUG prints if those fail, so check your dmesg closely?

http://lxr.free-electrons.com/source/drivers/char/tpm/tpm_tis.c#L250

If not, can you annotate in some printk's into tpm_tis_acpi_init and
recompile/re-test?

Jason

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-06 16:55   ` Jason Gunthorpe
@ 2017-04-06 18:26     ` Paul Menzel
  2017-04-06 19:10       ` Jason Gunthorpe
  2017-04-06 18:58     ` [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot Jarkko Sakkinen
  2017-04-08 10:40     ` Denis 'GNUtoo' Carikli
  2 siblings, 1 reply; 20+ messages in thread
From: Paul Menzel @ 2017-04-06 18:26 UTC (permalink / raw)
  To: Jason Gunthorpe; +Cc: Maciej S. Szmigiero, tpmdd-devel, linux-kernel, GNUtoo

On 2017-04-06 18:55, Jason Gunthorpe wrote:
> On Thu, Apr 06, 2017 at 08:18:33AM +0200, Paul Menzel wrote:
> 
>> Indeed, that improves the situation. I still need to pass `force=1` to 
>> the
>> module to get `/dev/tpm0`. No idea, why it’s not in included in Linux 
>> 4.9
>> yet.
> 
> Fair point.. Jarkko - could you forward that patch to -stable?
> 
>> $ journalctl -k -o cat | grep tpm
>> tpm_tis tpm_tis: 1.2 TPM (device-id 0x3202, rev-id 5)
>> tpm tpm0: Issuing TPM_STARTUP
>> tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 
>> 10000->10000us B
>> 10000->10000us C 0->752000us D 0->752000us
> 
> There could be more relavent kernel messages than this, try
>   grep -i tpm
> 
> ?

At least I don’t spot more messages.

```
$ journalctl -b -3 -o cat | grep -i -e "Linux version" -e tpm
Linux version 4.11.0-rc5+ (root@d44d03a193d6) (gcc version 6.3.0 
20170321 (Debian 6.3.0-10) ) #2 SMP Tue Apr 4 21:07:08 UTC 2017
joey : TTY=pts/6 ; PWD=/home/joey ; USER=root ; COMMAND=/usr/bin/apt 
install tpm-tools
new user: name=tss, UID=123, GID=137, home=/var/lib/tpm, 
shell=/bin/false
joey : TTY=pts/6 ; PWD=/home/joey ; USER=root ; COMMAND=/sbin/modprobe 
-r tpm_tis tpm
joey : TTY=pts/6 ; PWD=/home/joey ; USER=root ; COMMAND=/sbin/modprobe 
tpm_tis force=1
tpm_tis tpm_tis: 1.2 TPM (device-id 0x3202, rev-id 5)
tpm tpm0: Issuing TPM_STARTUP
tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 
10000->10000us B 10000->10000us C 0->752000us D 0->752000us
```

>> So do you have an idea, what “ACPI requirements” changed in the `tpm` 
>> module
>> since Linux 3.16 to be loaded automatically?
> 
> We added direct ACPI binding to the driver in addition to PNP, so if
> you have an ACPI table it goes down that path and does some additional
> validation of what is in the TPM. The BIOS must provide a
> acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
> minimum.

Is it correct, that this is added in/for 4.11, so just recently? Testing 
with Linux 4.10.8, everything is detected just fine.

```
$ journalctl -k -o cat | grep -i tpm
tpm_tis 00:08: 1.2 TPM (device-id 0x3202, rev-id 5)
tpm tpm0: A TPM error (38) occurred attempting to determine the timeouts
tpm tpm0: Issuing TPM_STARTUP
tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 
10000->10000us B 10000->10000us C 0->752000us D 0->752000us
```

> There are FW_BUG prints if those fail, so check your dmesg closely?
> 
> http://lxr.free-electrons.com/source/drivers/char/tpm/tpm_tis.c#L250
> 
> If not, can you annotate in some printk's into tpm_tis_acpi_init and
> recompile/re-test?

If nothing comes to mind with the new information above, then I could do 
that. But I don’t know, if I’ll have time in the next two weeks for 
that.


Kind regards,

Paul

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-06 16:55   ` Jason Gunthorpe
  2017-04-06 18:26     ` Paul Menzel
@ 2017-04-06 18:58     ` Jarkko Sakkinen
  2017-04-08 10:40     ` Denis 'GNUtoo' Carikli
  2 siblings, 0 replies; 20+ messages in thread
From: Jarkko Sakkinen @ 2017-04-06 18:58 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Paul Menzel, Maciej S. Szmigiero, tpmdd-devel, linux-kernel, GNUtoo

On Thu, Apr 06, 2017 at 10:55:57AM -0600, Jason Gunthorpe wrote:
> On Thu, Apr 06, 2017 at 08:18:33AM +0200, Paul Menzel wrote:
> 
> > Indeed, that improves the situation. I still need to pass `force=1` to the
> > module to get `/dev/tpm0`. No idea, why it’s not in included in Linux 4.9
> > yet.
> 
> Fair point.. Jarkko - could you forward that patch to -stable?

Yes.

/Jarkko

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-06 18:26     ` Paul Menzel
@ 2017-04-06 19:10       ` Jason Gunthorpe
  2017-04-07 20:13         ` Jarkko Sakkinen
  0 siblings, 1 reply; 20+ messages in thread
From: Jason Gunthorpe @ 2017-04-06 19:10 UTC (permalink / raw)
  To: Paul Menzel; +Cc: Maciej S. Szmigiero, tpmdd-devel, linux-kernel, GNUtoo

On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
> >We added direct ACPI binding to the driver in addition to PNP, so if
> >you have an ACPI table it goes down that path and does some additional
> >validation of what is in the TPM. The BIOS must provide a
> >acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
> >minimum.
> 
> Is it correct, that this is added in/for 4.11, so just recently? Testing
> with Linux 4.10.8, everything is detected just fine.

No, it is quite a bit older.. And it should only go for TPM2, which I
don't think you have??

Maybe Jarkko has a guess, but sure sounds like something is recently
broken in 4.11

Jason

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-06 19:10       ` Jason Gunthorpe
@ 2017-04-07 20:13         ` Jarkko Sakkinen
  2017-04-07 20:58           ` Paul Menzel
  0 siblings, 1 reply; 20+ messages in thread
From: Jarkko Sakkinen @ 2017-04-07 20:13 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: Paul Menzel, Maciej S. Szmigiero, tpmdd-devel, linux-kernel, GNUtoo

On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote:
> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
> > >We added direct ACPI binding to the driver in addition to PNP, so if
> > >you have an ACPI table it goes down that path and does some additional
> > >validation of what is in the TPM. The BIOS must provide a
> > >acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
> > >minimum.
> > 
> > Is it correct, that this is added in/for 4.11, so just recently? Testing
> > with Linux 4.10.8, everything is detected just fine.
> 
> No, it is quite a bit older.. And it should only go for TPM2, which I
> don't think you have??
> 
> Maybe Jarkko has a guess, but sure sounds like something is recently
> broken in 4.11
> 
> Jason

I'll come back to this. I have to re-read the whole mail thread to
get back into the context. Lots of multitasking because of release
and so forth. Sorry for the latency!

/Jarkko

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-07 20:13         ` Jarkko Sakkinen
@ 2017-04-07 20:58           ` Paul Menzel
  2017-04-09 17:34             ` [Regression Linux 4.11] TPM module not loaded anymore (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot) Paul Menzel
  0 siblings, 1 reply; 20+ messages in thread
From: Paul Menzel @ 2017-04-07 20:58 UTC (permalink / raw)
  To: Jarkko Sakkinen
  Cc: Jason Gunthorpe, Maciej S. Szmigiero, tpmdd-devel, linux-kernel,
	GNUtoo, Arthur Heymans

Dear Jarkko,


On 2017-04-07 22:13, Jarkko Sakkinen wrote:
> On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote:
>> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
>> > >We added direct ACPI binding to the driver in addition to PNP, so if
>> > >you have an ACPI table it goes down that path and does some additional
>> > >validation of what is in the TPM. The BIOS must provide a
>> > >acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
>> > >minimum.
>> >
>> > Is it correct, that this is added in/for 4.11, so just recently? Testing
>> > with Linux 4.10.8, everything is detected just fine.
>> 
>> No, it is quite a bit older.. And it should only go for TPM2, which I
>> don't think you have??
>> 
>> Maybe Jarkko has a guess, but sure sounds like something is recently
>> broken in 4.11
>> 
>> Jason
> 
> I'll come back to this. I have to re-read the whole mail thread to
> get back into the context. Lots of multitasking because of release
> and so forth. Sorry for the latency!

I started bisecting this issue. This is the current state.

```
# git bisect log
# bad: [7a771ceac771d009f7203c40b256b0608d7ea2f8] Merge tag 
'dm-4.11-changes' of 
git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm
# good: [c470abd4fde40ea6a0846a2beab642a578c0b8cd] Linux 4.10
git bisect start 'HEAD' 'v4.10'
# good: [b3de5ad688f0f52457e73767f95a640ab4158d0d] Merge tag 
'regmap-v4.11' of 
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
git bisect good b3de5ad688f0f52457e73767f95a640ab4158d0d
```


Kind regards,

Paul

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-06 16:55   ` Jason Gunthorpe
  2017-04-06 18:26     ` Paul Menzel
  2017-04-06 18:58     ` [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot Jarkko Sakkinen
@ 2017-04-08 10:40     ` Denis 'GNUtoo' Carikli
  2017-04-08 20:25       ` Jason Gunthorpe
  2 siblings, 1 reply; 20+ messages in thread
From: Denis 'GNUtoo' Carikli @ 2017-04-08 10:40 UTC (permalink / raw)
  To: Paul Menzel
  Cc: Jason Gunthorpe, Maciej S. Szmigiero, tpmdd-devel, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 1510 bytes --]

Hi Paul,

On Thu, 6 Apr 2017 10:55:57 -0600
Jason Gunthorpe <jgunthorpe@obsidianresearch.com> wrote:

> We added direct ACPI binding to the driver in addition to PNP, so if
> you have an ACPI table it goes down that path and does some additional
> validation of what is in the TPM. The BIOS must provide a
> acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
> minimum.

I am working on it[1]. This commit has not been merged and is a work in
progress. It is however available in coreboot's gerrit.

So far with it and a recent kernel and the patch mentioned above:
- The linux driver finds the TPM automatically and doesn't require
  force=1
- The driver however still require itpm=1 to fully work: without it the
  tpm is found, but I wasn't able to read the PCRs.

Since I use a rolling release distribution, the kenrel version I use
tend to change quite fast, I can re-test if needed.

I need to improve the following in my patch:
- The IDs readings obviously need to be fixed.
- I want to make it work without itpm=1 if possible. I'll test with
  INTC0102 as it is in the driver in the is_itpm function, and it was
  also suggested to me by someone on IRC.

I also still need to investigate more why the itpm workaround is needed.
Does the TPM shipped in such laptops respect the specifications?
Is the wiring bad?

References:
-----------
[1]https://review.coreboot.org/cgit/coreboot.git/commit/?id=060cf4e0f50f765f85e3ecedd836eed85d1571fe

Denis.

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot
  2017-04-08 10:40     ` Denis 'GNUtoo' Carikli
@ 2017-04-08 20:25       ` Jason Gunthorpe
  0 siblings, 0 replies; 20+ messages in thread
From: Jason Gunthorpe @ 2017-04-08 20:25 UTC (permalink / raw)
  To: Denis 'GNUtoo' Carikli
  Cc: Paul Menzel, Maciej S. Szmigiero, tpmdd-devel, linux-kernel

On Sat, Apr 08, 2017 at 12:40:25PM +0200, Denis 'GNUtoo' Carikli wrote:

> I am working on it[1]. This commit has not been merged and is a work in
> progress. It is however available in coreboot's gerrit.

How did this work on any kernels if there was no PNP or ACPI entry?

FWIW, I wonder if coreboot is missing the code for wait_startup
in drivers/char/tpm/tpm_tis_core.c. If you don't do that step then
the DID/VID might not read properly.

> So far with it and a recent kernel and the patch mentioned above:
> - The linux driver finds the TPM automatically and doesn't require
>   force=1
> - The driver however still require itpm=1 to fully work: without it the
>   tpm is found, but I wasn't able to read the PCRs.

Unless it is an actual broken intel TPM you should never use
itpm=1. Juding by the log messages, it certainly is not.

Intel mode breaks the driver and removes certain error detection, eg
it may erronously succeed.

It is more likely that the failure to read PCRs reflects reality and
itpm=1 just supresses that error detection.

The TPM may need to be setup (eg cleared, EK generated, p/vflags setup
etc, etc) before it will support PCRs.

Usually the BIOS would do these steps when the TPM is first enabled,
you probably need to do them in userspace instead.

WARNING: Failure to provision the TPM properly before first use
could leave it in 'factory test' mode, which basically means it
doesn't work properly at all.

> - I want to make it work without itpm=1 if possible. I'll test with
>   INTC0102 as it is in the driver in the is_itpm function, and it was
>   also suggested to me by someone on IRC.

Don't do this unless it is actually that TPM.

Jason

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [Regression Linux 4.11] TPM module not loaded anymore  (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
  2017-04-07 20:58           ` Paul Menzel
@ 2017-04-09 17:34             ` Paul Menzel
  2017-04-11 22:57               ` Jarkko Sakkinen
  0 siblings, 1 reply; 20+ messages in thread
From: Paul Menzel @ 2017-04-09 17:34 UTC (permalink / raw)
  To: Jarkko Sakkinen, Bob Moore
  Cc: Maciej S. Szmigiero, linux-kernel, Arthur Heymans, tpmdd-devel,
	GNUtoo, Lv Zheng, Rafael J. Wysocki

[-- Attachment #1: Type: text/plain, Size: 4318 bytes --]

Dear Linux folks,


It turns out that stricter checks in the ACPI subsystem, introduced in
commit 57707a9a77 (ACPICA: Resources: Not a valid resource if buffer
length too long) [1], cause the TPM module not to be loaded anymore on
the Lenovo X60 with coreboot [2].

Am Freitag, den 07.04.2017, 22:58 +0200 schrieb Paul Menzel:
> On 2017-04-07 22:13, Jarkko Sakkinen wrote:
> > On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote:
> >> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
> >> > >We added direct ACPI binding to the driver in addition to PNP, so if
> >> > >you have an ACPI table it goes down that path and does some additional
> >> > >validation of what is in the TPM. The BIOS must provide a
> >> > >acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
> >> > >minimum.
> >> >
> >> > Is it correct, that this is added in/for 4.11, so just recently? Testing
> >> > with Linux 4.10.8, everything is detected just fine.
> >> 
> >> No, it is quite a bit older.. And it should only go for TPM2, which I
> >> don't think you have??
> >> 
> >> Maybe Jarkko has a guess, but sure sounds like something is recently
> >> broken in 4.11
> > 
> > I'll come back to this. I have to re-read the whole mail thread to
> > get back into the context. Lots of multitasking because of release
> > and so forth. Sorry for the latency!
> 
> I started bisecting this issue. This is the current state.

[…]

Here are the results.

```
git bisect log
# bad: [7a771ceac771d009f7203c40b256b0608d7ea2f8] Merge tag 'dm-4.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm
# good: [c470abd4fde40ea6a0846a2beab642a578c0b8cd] Linux 4.10
git bisect start 'HEAD' 'v4.10'
# good: [b3de5ad688f0f52457e73767f95a640ab4158d0d] Merge tag 'regmap-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
git bisect good b3de5ad688f0f52457e73767f95a640ab4158d0d
# bad: [fd4a61e08aa79f2b7835b25c6f94f27bd2d65990] sched/core: Fix build paravirt build on arm and arm64
git bisect bad fd4a61e08aa79f2b7835b25c6f94f27bd2d65990
# good: [7aa7d608112baf63a0b1278955f9619427373807] Merge tag 'leds_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds
git bisect good 7aa7d608112baf63a0b1278955f9619427373807
# good: [02c3de1105228e367320e7fdeffbf511904f398c] Merge tag 'pm-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
git bisect good 02c3de1105228e367320e7fdeffbf511904f398c
# bad: [6c24337f22115d669e24ce990842dab667371b4d] Merge tag 'fscrypt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt
git bisect bad 6c24337f22115d669e24ce990842dab667371b4d
# bad: [a74d1cafc22e100a9b59c50943ca09c37e03dce8] Merge branches 'acpi-bus', 'acpi-sleep' and 'acpi-processor'
git bisect bad a74d1cafc22e100a9b59c50943ca09c37e03dce8
# bad: [ce87e09dd88c61f9088768a7708828423549725c] ACPICA: Parser: Allow method invocations as target operands
git bisect bad ce87e09dd88c61f9088768a7708828423549725c
# good: [0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076] ACPICA: Hardware: Add sleep register hooks
git bisect good 0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076
# good: [a654b8ca6d28736995de767ba62e801fd806a3b2] ACPICA: Disassembler: Add Switch/Case disassembly support
git bisect good a654b8ca6d28736995de767ba62e801fd806a3b2
# bad: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources: Not a valid resource if buffer length too long
git bisect bad 57707a9a7780fab426b8ae9b4c7b65b912a748b3
# good: [7225d0467c59e55566df396d6ecd5baf26ef3d9b] ACPICA: Utilities: Update debug output
git bisect good 7225d0467c59e55566df396d6ecd5baf26ef3d9b
# first bad commit: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources: Not a valid resource if buffer length too long
```

I suggest, that just a warning is printed in this case, or that an
option is added to enable some kind of “strict mode” or a quirk table.

Please find the decompiled DSDT attached. The code to generate the ASL
coreboot code is available [3].

Please tell me, what information you need.


Kind regards,

Paul


[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=57707a9a778
[2] https://review.coreboot.org/13410/
[3] https://review.coreboot.org/cgit/coreboot.git/tree/src/drivers/pc80/tpm/tpm.c

[-- Attachment #2: DSDT.dsl --]
[-- Type: text/x-dsl, Size: 142194 bytes --]

/*
 * Intel ACPI Component Architecture
 * AML Disassembler version 20140926-32 [Oct  1 2014]
 * Copyright (c) 2000 - 2014 Intel Corporation
 * 
 * Disassembly of DSDT, Sun Apr  9 19:30:34 2017
 *
 * Original Table Header:
 *     Signature        "DSDT"
 *     Length           0x00002E58 (11864)
 *     Revision         0x03
 *     Checksum         0x18
 *     OEM ID           "COREv4"
 *     OEM Table ID     "COREBOOT"
 *     OEM Revision     0x20090419 (537461785)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20140926 (538183974)
 */
DefinitionBlock ("DSDT.aml", "DSDT", 3, "COREv4", "COREBOOT", 0x20090419)
{

    External (_PR_.CP00, UnknownObj)
    External (_PR_.CP01, UnknownObj)
    External (LCD0, UnknownObj)
    External (PDC0, UnknownObj)
    External (PDC1, UnknownObj)

    Scope (\)
    {
        Name (NVSA, 0x7F7FE980)
    }

    Method (_PTS, 1, NotSerialized)  // _PTS: Prepare To Sleep
    {
        \_SB.PCI0.LPCB.EC.MUTE (One)
        \_SB.PCI0.LPCB.EC.USBP (Zero)
        \_SB.PCI0.LPCB.EC.RADI (Zero)
    }

    Method (_WAK, 1, NotSerialized)  // _WAK: Wake
    {
        If (LEqual (Arg0, 0x03)) {}
        If (LEqual (Arg0, 0x04)) {}
        Return (Package (0x02)
        {
            Zero, 
            Zero
        })
    }

    Scope (_SB)
    {
        Method (_INI, 0, NotSerialized)  // _INI: Initialize
        {
            GOS ()
            If (LAnd (LEqual (OSYS, 0x07D1), MPEN)) {}
        }
    }

    Name (PICM, Zero)
    Name (DSEN, One)
    OperationRegion (GNVS, SystemMemory, NVSA, 0x0100)
    Field (GNVS, ByteAcc, NoLock, Preserve)
    {
        OSYS,   16, 
        SMIF,   8, 
        PRM0,   8, 
        PRM1,   8, 
        SCIF,   8, 
        PRM2,   8, 
        PRM3,   8, 
        LCKF,   8, 
        PRM4,   8, 
        PRM5,   8, 
        P80D,   32, 
        LIDS,   8, 
        PWRS,   8, 
        DBGS,   8, 
        LINX,   8, 
        DCKN,   8, 
        ACTT,   8, 
        PSVT,   8, 
        TC1V,   8, 
        TC2V,   8, 
        TSPV,   8, 
        CRTT,   8, 
        DTSE,   8, 
        DTS1,   8, 
        DTS2,   8, 
        Offset (0x1E), 
        BNUM,   8, 
        B0SC,   8, 
        B1SC,   8, 
        B2SC,   8, 
        B0SS,   8, 
        B1SS,   8, 
        B2SS,   8, 
        Offset (0x28), 
        APIC,   8, 
        MPEN,   8, 
        PCP0,   8, 
        PCP1,   8, 
        PPCM,   8, 
        Offset (0x32), 
        NATP,   8, 
        CMAP,   8, 
        CMBP,   8, 
        LPTP,   8, 
        FDCP,   8, 
        RFDV,   8, 
        HOTK,   8, 
        RTCF,   8, 
        UTIL,   8, 
        ACIN,   8, 
        IGDS,   8, 
        TLST,   8, 
        CADL,   8, 
        PADL,   8, 
        CSTE,   16, 
        NSTE,   16, 
        SSTE,   16, 
        NDID,   8, 
        DID1,   32, 
        DID2,   32, 
        DID3,   32, 
        DID4,   32, 
        DID5,   32, 
        Offset (0x64), 
        BLCS,   8, 
        BRTL,   8, 
        ODDS,   8, 
        Offset (0x6E), 
        ALSE,   8, 
        ALAF,   8, 
        LLOW,   8, 
        LHIH,   8, 
        Offset (0x78), 
        EMAE,   8, 
        EMAP,   16, 
        EMAL,   16, 
        Offset (0x82), 
        MEFE,   8, 
        Offset (0x8C), 
        TPMP,   8, 
        TPME,   8, 
        Offset (0x96), 
        GTF0,   56, 
        GTF1,   56, 
        GTF2,   56, 
        IDEM,   8, 
        IDET,   8, 
        Offset (0xB4), 
        ASLB,   32, 
        IBTT,   8, 
        IPAT,   8, 
        ITVF,   8, 
        ITVM,   8, 
        IPSC,   8, 
        IBLC,   8, 
        IBIA,   8, 
        ISSC,   8, 
        I409,   8, 
        I509,   8, 
        I609,   8, 
        I709,   8, 
        IDMM,   8, 
        IDMS,   8, 
        IF1E,   8, 
        HVCO,   8, 
        NXD1,   32, 
        NXD2,   32, 
        NXD3,   32, 
        NXD4,   32, 
        NXD5,   32, 
        NXD6,   32, 
        NXD7,   32, 
        NXD8,   32, 
        Offset (0xF0), 
        DOCK,   8, 
        BTEN,   8
    }

    OperationRegion (APMP, SystemIO, 0xB2, 0x02)
    Field (APMP, ByteAcc, NoLock, Preserve)
    {
        APMC,   8, 
        APMS,   8
    }

    OperationRegion (POST, SystemIO, 0x80, One)
    Field (POST, ByteAcc, Lock, Preserve)
    {
        DBG0,   8
    }

    Method (TRAP, 1, Serialized)
    {
        Store (Arg0, SMIF) /* \SMIF */
        Store (Zero, TRP0) /* \TRP0 */
        Return (SMIF) /* \SMIF */
    }

    Method (_PIC, 1, NotSerialized)  // _PIC: Interrupt Model
    {
        Store (Arg0, PICM) /* \PICM */
    }

    Method (GOS, 0, NotSerialized)
    {
        Store (0x07D0, OSYS) /* \OSYS */
        If (CondRefOf (_OSI))
        {
            If (_OSI ("Linux"))
            {
                Store (One, LINX) /* \LINX */
            }

            If (_OSI ("Windows 2001"))
            {
                Store (0x07D1, OSYS) /* \OSYS */
            }

            If (_OSI ("Windows 2001 SP1"))
            {
                Store (0x07D1, OSYS) /* \OSYS */
            }

            If (_OSI ("Windows 2001 SP2"))
            {
                Store (0x07D2, OSYS) /* \OSYS */
            }

            If (_OSI ("Windows 2006"))
            {
                Store (0x07D6, OSYS) /* \OSYS */
            }
        }
    }

    Scope (_GPE)
    {
        Method (_L18, 0, NotSerialized)  // _Lxx: Level-Triggered GPE
        {
            Store (\_SB.PCI0.LPCB.EC.WAKE, Local0)
            Increment (Local0)
        }
    }

    Method (PNOT, 0, NotSerialized)
    {
        If (MPEN)
        {
            If (And (PDC0, 0x08))
            {
                Notify (\_PR.CP00, 0x80) // Status Change
                If (And (PDC0, 0x10))
                {
                    Sleep (0x64)
                    Notify (\_PR.CP00, 0x81) // Information Change
                }
            }

            If (And (PDC1, 0x08))
            {
                Notify (\_PR.CP01, 0x80) // Status Change
                If (And (PDC1, 0x10))
                {
                    Sleep (0x64)
                    Notify (\_PR.CP01, 0x81) // Information Change
                }
            }
        }
        Else
        {
            Notify (\_PR.CP00, 0x80) // Status Change
            Sleep (0x64)
            Notify (\_PR.CP00, 0x81) // Information Change
        }
    }

    Scope (_SB)
    {
        Device (PCI0)
        {
            Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */)  // _HID: Hardware ID
            Name (_CID, EisaId ("PNP0A03") /* PCI Bus */)  // _CID: Compatible ID
            Name (_ADR, Zero)  // _ADR: Address
            Name (_BBN, Zero)  // _BBN: BIOS Bus Number
            Device (MCHC)
            {
                Name (_ADR, Zero)  // _ADR: Address
                OperationRegion (MCHP, PCI_Config, Zero, 0x0100)
                Field (MCHP, DWordAcc, NoLock, Preserve)
                {
                    Offset (0x40), 
                    EPEN,   1, 
                        ,   11, 
                    EPBR,   20, 
                    MHEN,   1, 
                        ,   13, 
                    MHBR,   18, 
                    PXEN,   1, 
                    PXSZ,   2, 
                        ,   23, 
                    PXBR,   6, 
                    DMEN,   1, 
                        ,   11, 
                    DMBR,   20, 
                    Offset (0x90), 
                        ,   4, 
                    PM0H,   2, 
                    Offset (0x91), 
                    PM1L,   2, 
                        ,   2, 
                    PM1H,   2, 
                    Offset (0x92), 
                    PM2L,   2, 
                        ,   2, 
                    PM2H,   2, 
                    Offset (0x93), 
                    PM3L,   2, 
                        ,   2, 
                    PM3H,   2, 
                    Offset (0x94), 
                    PM4L,   2, 
                        ,   2, 
                    PM4H,   2, 
                    Offset (0x95), 
                    PM5L,   2, 
                        ,   2, 
                    PM5H,   2, 
                    Offset (0x96), 
                    PM6L,   2, 
                        ,   2, 
                    PM6H,   2, 
                    Offset (0x97), 
                    Offset (0x9C), 
                        ,   3, 
                    TLUD,   5, 
                    Offset (0xA0), 
                    TOM,    16
                }
            }

            Name (MCRS, ResourceTemplate ()
            {
                WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
                    0x0000,             // Granularity
                    0x0000,             // Range Minimum
                    0x00FF,             // Range Maximum
                    0x0000,             // Translation Offset
                    0x0100,             // Length
                    ,, )
                DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
                    0x00000000,         // Granularity
                    0x00000000,         // Range Minimum
                    0x00000CF7,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00000CF8,         // Length
                    ,, , TypeStatic)
                IO (Decode16,
                    0x0CF8,             // Range Minimum
                    0x0CF8,             // Range Maximum
                    0x01,               // Alignment
                    0x08,               // Length
                    )
                DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
                    0x00000000,         // Granularity
                    0x00000D00,         // Range Minimum
                    0x0000FFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x0000F300,         // Length
                    ,, , TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000A0000,         // Range Minimum
                    0x000BFFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00020000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000C0000,         // Range Minimum
                    0x000C3FFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000C4000,         // Range Minimum
                    0x000C7FFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000C8000,         // Range Minimum
                    0x000CBFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000CC000,         // Range Minimum
                    0x000CFFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000D0000,         // Range Minimum
                    0x000D3FFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000D4000,         // Range Minimum
                    0x000D7FFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000D8000,         // Range Minimum
                    0x000DBFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000DC000,         // Range Minimum
                    0x000DFFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000E0000,         // Range Minimum
                    0x000E3FFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000E4000,         // Range Minimum
                    0x000E7FFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000E8000,         // Range Minimum
                    0x000EBFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000EC000,         // Range Minimum
                    0x000EFFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00004000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x000F0000,         // Range Minimum
                    0x000FFFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00010000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0x00000000,         // Range Minimum
                    0xFEBFFFFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0xFEC00000,         // Length
                    ,, _Y00, AddressRangeMemory, TypeStatic)
                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
                    0x00000000,         // Granularity
                    0xFED40000,         // Range Minimum
                    0xFED44FFF,         // Range Maximum
                    0x00000000,         // Translation Offset
                    0x00005000,         // Length
                    ,, , AddressRangeMemory, TypeStatic)
            })
            Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
            {
                CreateDWordField (MCRS, \_SB.PCI0._Y00._MIN, PMIN)  // _MIN: Minimum Base Address
                CreateDWordField (MCRS, \_SB.PCI0._Y00._MAX, PMAX)  // _MAX: Maximum Base Address
                CreateDWordField (MCRS, \_SB.PCI0._Y00._LEN, PLEN)  // _LEN: Length
                ShiftLeft (^MCHC.TLUD, 0x1B, PMIN) /* \_SB_.PCI0._CRS.PMIN */
                Add (Subtract (PMAX, PMIN), One, PLEN) /* \_SB_.PCI0._CRS.PLEN */
                Return (MCRS) /* \_SB_.PCI0.MCRS */
            }

            Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
            {
                If (PICM)
                {
                    Return (Package (0x0D)
                    {
                        Package (0x04)
                        {
                            0x0002FFFF, 
                            Zero, 
                            Zero, 
                            0x10
                        }, 

                        Package (0x04)
                        {
                            0x001BFFFF, 
                            One, 
                            Zero, 
                            0x11
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            Zero, 
                            Zero, 
                            0x14
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            One, 
                            Zero, 
                            0x15
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            0x02, 
                            Zero, 
                            0x16
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            0x03, 
                            Zero, 
                            0x17
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            Zero, 
                            Zero, 
                            0x10
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            One, 
                            Zero, 
                            0x11
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            0x02, 
                            Zero, 
                            0x12
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            0x03, 
                            Zero, 
                            0x13
                        }, 

                        Package (0x04)
                        {
                            0x001FFFFF, 
                            Zero, 
                            Zero, 
                            0x17
                        }, 

                        Package (0x04)
                        {
                            0x001FFFFF, 
                            One, 
                            Zero, 
                            0x10
                        }, 

                        Package (0x04)
                        {
                            0x001FFFFF, 
                            0x02, 
                            Zero, 
                            0x10
                        }
                    })
                }
                Else
                {
                    Return (Package (0x0D)
                    {
                        Package (0x04)
                        {
                            0x0002FFFF, 
                            Zero, 
                            ^LPCB.LNKA, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001BFFFF, 
                            One, 
                            ^LPCB.LNKB, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            Zero, 
                            ^LPCB.LNKE, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            One, 
                            ^LPCB.LNKF, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            0x02, 
                            ^LPCB.LNKG, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001CFFFF, 
                            0x03, 
                            ^LPCB.LNKH, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            Zero, 
                            ^LPCB.LNKA, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            One, 
                            ^LPCB.LNKB, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            0x02, 
                            ^LPCB.LNKC, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001DFFFF, 
                            0x03, 
                            ^LPCB.LNKD, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001FFFFF, 
                            Zero, 
                            ^LPCB.LNKH, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001FFFFF, 
                            One, 
                            ^LPCB.LNKA, 
                            Zero
                        }, 

                        Package (0x04)
                        {
                            0x001FFFFF, 
                            0x02, 
                            ^LPCB.LNKA, 
                            Zero
                        }
                    })
                }
            }

            Method (_OSC, 4, NotSerialized)  // _OSC: Operating System Capabilities
            {
                CreateDWordField (Arg3, Zero, CDW1)
                CreateDWordField (Arg3, 0x04, CDW2)
                CreateDWordField (Arg3, 0x08, CDW3)
                If (LEqual (Arg0, ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
                {
                    Return (Arg3)
                }
                Else
                {
                    Or (CDW1, 0x04, CDW1) /* \_SB_.PCI0._OSC.CDW1 */
                    Return (Arg3)
                }
            }

            Device (PDRC)
            {
                Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */)  // _HID: Hardware ID
                Name (_UID, One)  // _UID: Unique ID
                Name (PDRS, ResourceTemplate ()
                {
                    Memory32Fixed (ReadWrite,
                        0xFED1C000,         // Address Base
                        0x00004000,         // Address Length
                        )
                    Memory32Fixed (ReadWrite,
                        0xFED14000,         // Address Base
                        0x00004000,         // Address Length
                        )
                    Memory32Fixed (ReadWrite,
                        0xFED18000,         // Address Base
                        0x00001000,         // Address Length
                        )
                    Memory32Fixed (ReadWrite,
                        0xFED19000,         // Address Base
                        0x00001000,         // Address Length
                        )
                    Memory32Fixed (ReadWrite,
                        0xF0000000,         // Address Base
                        0x04000000,         // Address Length
                        )
                    Memory32Fixed (ReadWrite,
                        0xFED20000,         // Address Base
                        0x00020000,         // Address Length
                        )
                    Memory32Fixed (ReadWrite,
                        0xFED40000,         // Address Base
                        0x00005000,         // Address Length
                        )
                    Memory32Fixed (ReadWrite,
                        0xFED45000,         // Address Base
                        0x0004B000,         // Address Length
                        )
                })
                Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                {
                    Return (PDRS) /* \_SB_.PCI0.PDRC.PDRS */
                }
            }

            Device (PEGP)
            {
                Name (_ADR, 0x00010000)  // _ADR: Address
                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x10
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x11
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x12
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                Zero, 
                                0x13
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKA, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKB, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKC, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                ^^LPCB.LNKD, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (GFX0)
            {
                Name (_ADR, 0x00020000)  // _ADR: Address
                Name (BRIG, Package (0x12)
                {
                    0x0F, 
                    0x0F, 
                    Zero, 
                    One, 
                    0x02, 
                    0x03, 
                    0x04, 
                    0x05, 
                    0x06, 
                    0x07, 
                    0x08, 
                    0x09, 
                    0x0A, 
                    0x0B, 
                    0x0C, 
                    0x0D, 
                    0x0E, 
                    0x0F
                })
                Method (XBCM, 1, NotSerialized)
                {
                    Store (Or (ShiftLeft (Arg0, 0x04), 0x0F), ^^DSPC.BRTC) /* \_SB_.PCI0.DSPC.BRTC */
                    TRAP (0x03)
                }

                Method (XBQC, 0, NotSerialized)
                {
                    Store (^^DSPC.BRTC, Local0)
                    ShiftRight (Local0, 0x04, Local0)
                    Return (Local0)
                }

                Name (BRCT, Zero)
                Method (BRID, 1, NotSerialized)
                {
                    Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 0x02), Local0)
                    If (LEqual (Local0, Ones))
                    {
                        Return (Subtract (SizeOf (BRIG), One))
                    }

                    Return (Local0)
                }

                Method (XBCL, 0, NotSerialized)
                {
                    Store (One, BRCT) /* \_SB_.PCI0.GFX0.BRCT */
                    Return (BRIG) /* \_SB_.PCI0.GFX0.BRIG */
                }

                Method (_DOS, 1, NotSerialized)  // _DOS: Disable Output Switching
                {
                    Store (And (Arg0, 0x07), DSEN) /* \DSEN */
                }

                Method (DECB, 0, NotSerialized)
                {
                    If (BRCT)
                    {
                        Notify (LCD0, 0x87) // Device-Specific
                    }
                    Else
                    {
                        Store (BRID (XBQC ()), Local0)
                        If (LNotEqual (Local0, 0x02))
                        {
                            Decrement (Local0)
                        }

                        XBCM (DerefOf (Index (BRIG, Local0)))
                    }
                }

                Method (INCB, 0, NotSerialized)
                {
                    If (BRCT)
                    {
                        Notify (LCD0, 0x86) // Device-Specific
                    }
                    Else
                    {
                        Store (BRID (XBQC ()), Local0)
                        If (LNotEqual (Local0, Subtract (SizeOf (BRIG), One)))
                        {
                            Increment (Local0)
                        }

                        XBCM (DerefOf (Index (BRIG, Local0)))
                    }
                }

                Method (XDCS, 1, NotSerialized)
                {
                    TRAP (One)
                    If (And (CSTE, ShiftLeft (One, Arg0)))
                    {
                        Return (0x1F)
                    }

                    Return (0x1D)
                }

                Method (XDGS, 1, NotSerialized)
                {
                    If (And (NSTE, ShiftLeft (One, Arg0)))
                    {
                        Return (One)
                    }

                    Return (Zero)
                }

                Method (XDSS, 2, NotSerialized)
                {
                    If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
                    {
                        Store (NSTE, CSTE) /* \CSTE */
                    }
                }
            }

            Device (DSPC)
            {
                Name (_ADR, 0x00020001)  // _ADR: Address
                OperationRegion (DSPC, PCI_Config, Zero, 0x0100)
                Field (DSPC, ByteAcc, NoLock, Preserve)
                {
                    Offset (0xF4), 
                    BRTC,   8
                }
            }

            Scope (\)
            {
                OperationRegion (IO_T, SystemIO, 0x0800, 0x10)
                Field (IO_T, ByteAcc, NoLock, Preserve)
                {
                    Offset (0x08), 
                    TRP0,   8
                }

                OperationRegion (PMIO, SystemIO, 0x0500, 0x80)
                Field (PMIO, ByteAcc, NoLock, Preserve)
                {
                    Offset (0x42), 
                        ,   1, 
                    GPEC,   1, 
                        ,   9, 
                    SCIS,   1, 
                        ,   6
                }

                OperationRegion (GPIO, SystemIO, 0x0480, 0x3C)
                Field (GPIO, ByteAcc, NoLock, Preserve)
                {
                    GU00,   8, 
                    GU01,   8, 
                    GU02,   8, 
                    GU03,   8, 
                    GIO0,   8, 
                    GIO1,   8, 
                    GIO2,   8, 
                    GIO3,   8, 
                    Offset (0x0C), 
                    GP00,   1, 
                    GP01,   1, 
                    GP02,   1, 
                    GP03,   1, 
                    GP04,   1, 
                    GP05,   1, 
                    GP06,   1, 
                    GP07,   1, 
                    GP08,   1, 
                    GP09,   1, 
                    GP10,   1, 
                    GP11,   1, 
                    GP12,   1, 
                    GP13,   1, 
                    GP14,   1, 
                    GP15,   1, 
                    GP16,   1, 
                    GP17,   1, 
                    GP18,   1, 
                    GP19,   1, 
                    GP20,   1, 
                    GP21,   1, 
                    GP22,   1, 
                    GP23,   1, 
                    GP24,   1, 
                    GP25,   1, 
                    GP26,   1, 
                    GP27,   1, 
                    GP28,   1, 
                    GP29,   1, 
                    GP30,   1, 
                    GP31,   1, 
                    Offset (0x18), 
                    GB00,   8, 
                    GB01,   8, 
                    GB02,   8, 
                    GB03,   8, 
                    Offset (0x2C), 
                    GIV0,   8, 
                    GIV1,   8, 
                    GIV2,   8, 
                    GIV3,   8, 
                    GU04,   8, 
                    GU05,   8, 
                    GU06,   8, 
                    GU07,   8, 
                    GIO4,   8, 
                    GIO5,   8, 
                    GIO6,   8, 
                    GIO7,   8, 
                    GP32,   1, 
                    GP33,   1, 
                    GP34,   1, 
                    GP35,   1, 
                    GP36,   1, 
                    GP37,   1, 
                    GP38,   1, 
                    GP39,   1, 
                    GL05,   8, 
                    GL06,   8, 
                    GL07,   8
                }

                OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000)
                Field (RCRB, DWordAcc, Lock, Preserve)
                {
                    Offset (0x1000), 
                    Offset (0x3000), 
                    Offset (0x3404), 
                    HPAS,   2, 
                        ,   5, 
                    HPTE,   1, 
                    Offset (0x3418), 
                        ,   1, 
                    PATD,   1, 
                    SATD,   1, 
                    SMBD,   1, 
                    HDAD,   1, 
                    A97D,   1, 
                    M97D,   1, 
                    ILND,   1, 
                    US1D,   1, 
                    US2D,   1, 
                    US3D,   1, 
                    US4D,   1, 
                        ,   2, 
                    LPBD,   1, 
                    EHCD,   1, 
                    RP1D,   1, 
                    RP2D,   1, 
                    RP3D,   1, 
                    RP4D,   1, 
                    RP5D,   1, 
                    RP6D,   1
                }
            }

            Device (HDEF)
            {
                Name (_ADR, 0x001B0000)  // _ADR: Address
                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x05, 
                    0x04
                })
            }

            Device (RP01)
            {
                Name (_ADR, 0x001C0000)  // _ADR: Address
                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x10
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x11
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x12
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                Zero, 
                                0x13
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKA, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKB, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKC, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                ^^LPCB.LNKD, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (RP02)
            {
                Name (_ADR, 0x001C0001)  // _ADR: Address
                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x11
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x12
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x13
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                Zero, 
                                0x10
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKB, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKC, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKD, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                ^^LPCB.LNKA, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (RP03)
            {
                Name (_ADR, 0x001C0002)  // _ADR: Address
                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x12
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x13
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x10
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                Zero, 
                                0x11
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKC, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKD, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKA, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                ^^LPCB.LNKB, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (RP04)
            {
                Name (_ADR, 0x001C0003)  // _ADR: Address
                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x13
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x10
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x11
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                Zero, 
                                0x12
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKD, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKA, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKB, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                ^^LPCB.LNKC, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (RP05)
            {
                Name (_ADR, 0x001C0004)  // _ADR: Address
                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x10
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x11
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x12
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                Zero, 
                                0x13
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKA, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKB, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKC, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                ^^LPCB.LNKD, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (RP06)
            {
                Name (_ADR, 0x001C0005)  // _ADR: Address
                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x11
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x12
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x13
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                Zero, 
                                0x10
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x04)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKB, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKC, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKD, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x03, 
                                ^^LPCB.LNKA, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (USB1)
            {
                Name (_ADR, 0x001D0000)  // _ADR: Address
                OperationRegion (U01P, PCI_Config, Zero, 0x0100)
                Field (U01P, DWordAcc, NoLock, Preserve)
                {
                    Offset (0xC4), 
                    U1WE,   2
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x03, 
                    0x04
                })
                Method (_PSW, 1, NotSerialized)  // _PSW: Power State Wake
                {
                    If (Arg0)
                    {
                        Store (0x03, U1WE) /* \_SB_.PCI0.USB1.U1WE */
                    }
                    Else
                    {
                        Store (Zero, U1WE) /* \_SB_.PCI0.USB1.U1WE */
                    }
                }

                Method (_S3D, 0, NotSerialized)  // _S3D: S3 Device State
                {
                    Return (0x02)
                }

                Method (_S4D, 0, NotSerialized)  // _S4D: S4 Device State
                {
                    Return (0x02)
                }
            }

            Device (USB2)
            {
                Name (_ADR, 0x001D0001)  // _ADR: Address
                OperationRegion (U02P, PCI_Config, Zero, 0x0100)
                Field (U02P, DWordAcc, NoLock, Preserve)
                {
                    Offset (0xC4), 
                    U2WE,   2
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x03, 
                    0x04
                })
                Method (_PSW, 1, NotSerialized)  // _PSW: Power State Wake
                {
                    If (Arg0)
                    {
                        Store (0x03, U2WE) /* \_SB_.PCI0.USB2.U2WE */
                    }
                    Else
                    {
                        Store (Zero, U2WE) /* \_SB_.PCI0.USB2.U2WE */
                    }
                }

                Method (_S3D, 0, NotSerialized)  // _S3D: S3 Device State
                {
                    Return (0x02)
                }

                Method (_S4D, 0, NotSerialized)  // _S4D: S4 Device State
                {
                    Return (0x02)
                }
            }

            Device (USB3)
            {
                Name (_ADR, 0x001D0002)  // _ADR: Address
                OperationRegion (U03P, PCI_Config, Zero, 0x0100)
                Field (U03P, DWordAcc, NoLock, Preserve)
                {
                    Offset (0xC4), 
                    U3WE,   2
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x03, 
                    0x04
                })
                Method (_PSW, 1, NotSerialized)  // _PSW: Power State Wake
                {
                    If (Arg0)
                    {
                        Store (0x03, U3WE) /* \_SB_.PCI0.USB3.U3WE */
                    }
                    Else
                    {
                        Store (Zero, U3WE) /* \_SB_.PCI0.USB3.U3WE */
                    }
                }

                Method (_S3D, 0, NotSerialized)  // _S3D: S3 Device State
                {
                    Return (0x02)
                }

                Method (_S4D, 0, NotSerialized)  // _S4D: S4 Device State
                {
                    Return (0x02)
                }
            }

            Device (USB4)
            {
                Name (_ADR, 0x001D0003)  // _ADR: Address
                OperationRegion (U04P, PCI_Config, Zero, 0x0100)
                Field (U04P, DWordAcc, NoLock, Preserve)
                {
                    Offset (0xC4), 
                    U4WE,   2
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x03, 
                    0x04
                })
                Method (_PSW, 1, NotSerialized)  // _PSW: Power State Wake
                {
                    If (Arg0)
                    {
                        Store (0x03, U4WE) /* \_SB_.PCI0.USB4.U4WE */
                    }
                    Else
                    {
                        Store (Zero, U4WE) /* \_SB_.PCI0.USB4.U4WE */
                    }
                }

                Method (_S3D, 0, NotSerialized)  // _S3D: S3 Device State
                {
                    Return (0x02)
                }

                Method (_S4D, 0, NotSerialized)  // _S4D: S4 Device State
                {
                    Return (0x02)
                }
            }

            Device (EHC1)
            {
                Name (_ADR, 0x001D0007)  // _ADR: Address
                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x0D, 
                    0x04
                })
                Method (_S3D, 0, NotSerialized)  // _S3D: S3 Device State
                {
                    Return (0x02)
                }

                Method (_S4D, 0, NotSerialized)  // _S4D: S4 Device State
                {
                    Return (0x02)
                }

                Device (HUB7)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Device (PRT1)
                    {
                        Name (_ADR, One)  // _ADR: Address
                    }

                    Device (PRT2)
                    {
                        Name (_ADR, 0x02)  // _ADR: Address
                    }

                    Device (PRT3)
                    {
                        Name (_ADR, 0x03)  // _ADR: Address
                    }

                    Device (PRT4)
                    {
                        Name (_ADR, 0x04)  // _ADR: Address
                    }

                    Device (PRT5)
                    {
                        Name (_ADR, 0x05)  // _ADR: Address
                    }

                    Device (PRT6)
                    {
                        Name (_ADR, 0x06)  // _ADR: Address
                    }
                }
            }

            Device (PCIB)
            {
                Name (_ADR, 0x001E0000)  // _ADR: Address
                Device (SLT1)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                    {
                        0x0B, 
                        0x04
                    })
                }

                Device (SLT2)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                    {
                        0x0B, 
                        0x04
                    })
                }

                Device (SLT3)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                    {
                        0x0B, 
                        0x04
                    })
                }

                Device (SLT6)
                {
                    Name (_ADR, 0x00050000)  // _ADR: Address
                    Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                    {
                        0x0B, 
                        0x04
                    })
                }

                Device (LANC)
                {
                    Name (_ADR, 0x00080000)  // _ADR: Address
                    Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                    {
                        0x0B, 
                        0x03
                    })
                }

                Device (LANR)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                    {
                        0x0B, 
                        0x03
                    })
                }

                Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                {
                    If (PICM)
                    {
                        Return (Package (0x07)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                Zero, 
                                0x10
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                Zero, 
                                0x11
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                Zero, 
                                0x12
                            }, 

                            Package (0x04)
                            {
                                0x0001FFFF, 
                                Zero, 
                                Zero, 
                                0x10
                            }, 

                            Package (0x04)
                            {
                                0x0002FFFF, 
                                Zero, 
                                Zero, 
                                0x15
                            }, 

                            Package (0x04)
                            {
                                0x0002FFFF, 
                                One, 
                                Zero, 
                                0x16
                            }, 

                            Package (0x04)
                            {
                                0x0008FFFF, 
                                Zero, 
                                Zero, 
                                0x14
                            }
                        })
                    }
                    Else
                    {
                        Return (Package (0x07)
                        {
                            Package (0x04)
                            {
                                0xFFFF, 
                                Zero, 
                                ^^LPCB.LNKA, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                One, 
                                ^^LPCB.LNKB, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0xFFFF, 
                                0x02, 
                                ^^LPCB.LNKC, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0x0001FFFF, 
                                Zero, 
                                ^^LPCB.LNKA, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0x0002FFFF, 
                                Zero, 
                                ^^LPCB.LNKF, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0x0002FFFF, 
                                One, 
                                ^^LPCB.LNKG, 
                                Zero
                            }, 

                            Package (0x04)
                            {
                                0x0008FFFF, 
                                Zero, 
                                ^^LPCB.LNKE, 
                                Zero
                            }
                        })
                    }
                }
            }

            Device (AUD0)
            {
                Name (_ADR, 0x001E0002)  // _ADR: Address
            }

            Device (MODM)
            {
                Name (_ADR, 0x001E0003)  // _ADR: Address
                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x05, 
                    0x04
                })
            }

            Device (LPCB)
            {
                Name (_ADR, 0x001F0000)  // _ADR: Address
                OperationRegion (LPC0, PCI_Config, Zero, 0x0100)
                Field (LPC0, AnyAcc, NoLock, Preserve)
                {
                    Offset (0x40), 
                    PMBS,   16, 
                    Offset (0x60), 
                    PRTA,   8, 
                    PRTB,   8, 
                    PRTC,   8, 
                    PRTD,   8, 
                    Offset (0x68), 
                    PRTE,   8, 
                    PRTF,   8, 
                    PRTG,   8, 
                    PRTH,   8, 
                    Offset (0x80), 
                    IOD0,   8, 
                    IOD1,   8, 
                    Offset (0xF0), 
                    RCEN,   1, 
                        ,   13, 
                    RCBA,   18
                }

                Device (LNKA)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, One)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTA) /* \_SB_.PCI0.LPCB.PRTA */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,10,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLA, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLA, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTA, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */
                        Return (RTLA) /* \_SB_.PCI0.LPCB.LNKA._CRS.RTLA */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTA) /* \_SB_.PCI0.LPCB.PRTA */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTA, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (LNKB)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, 0x02)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTB) /* \_SB_.PCI0.LPCB.PRTB */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,11,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLB, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLB, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTB, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */
                        Return (RTLB) /* \_SB_.PCI0.LPCB.LNKB._CRS.RTLB */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTB) /* \_SB_.PCI0.LPCB.PRTB */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTB, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (LNKC)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, 0x03)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTC) /* \_SB_.PCI0.LPCB.PRTC */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,10,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLC, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLC, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */
                        Return (RTLC) /* \_SB_.PCI0.LPCB.LNKC._CRS.RTLC */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTC) /* \_SB_.PCI0.LPCB.PRTC */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTC, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (LNKD)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, 0x04)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTD) /* \_SB_.PCI0.LPCB.PRTD */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,11,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLD, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLD, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTD, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */
                        Return (RTLD) /* \_SB_.PCI0.LPCB.LNKD._CRS.RTLD */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTD) /* \_SB_.PCI0.LPCB.PRTD */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTD, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (LNKE)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, 0x05)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTE) /* \_SB_.PCI0.LPCB.PRTE */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,10,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLE, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLE, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTE, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */
                        Return (RTLE) /* \_SB_.PCI0.LPCB.LNKE._CRS.RTLE */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTE) /* \_SB_.PCI0.LPCB.PRTE */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTE, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (LNKF)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, 0x06)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTF) /* \_SB_.PCI0.LPCB.PRTF */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,11,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLF, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLF, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTF, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */
                        Return (RTLF) /* \_SB_.PCI0.LPCB.LNKF._CRS.RTLF */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTF) /* \_SB_.PCI0.LPCB.PRTF */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTF, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (LNKG)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, 0x07)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTG) /* \_SB_.PCI0.LPCB.PRTG */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,10,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLG, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLG, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTG, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */
                        Return (RTLG) /* \_SB_.PCI0.LPCB.LNKG._CRS.RTLG */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTG) /* \_SB_.PCI0.LPCB.PRTG */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTG, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (LNKH)
                {
                    Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */)  // _HID: Hardware ID
                    Name (_UID, 0x08)  // _UID: Unique ID
                    Method (_DIS, 0, Serialized)  // _DIS: Disable Device
                    {
                        Store (0x80, PRTH) /* \_SB_.PCI0.LPCB.PRTH */
                    }

                    Name (_PRS, ResourceTemplate ()  // _PRS: Possible Resource Settings
                    {
                        IRQ (Level, ActiveLow, Shared, )
                            {3,4,5,6,7,11,12,14,15}
                    })
                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        Name (RTLH, ResourceTemplate ()
                        {
                            IRQ (Level, ActiveLow, Shared, )
                                {}
                        })
                        CreateWordField (RTLH, One, IRQ0)
                        Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */
                        ShiftLeft (One, And (PRTH, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */
                        Return (RTLH) /* \_SB_.PCI0.LPCB.LNKH._CRS.RTLH */
                    }

                    Method (_SRS, 1, Serialized)  // _SRS: Set Resource Settings
                    {
                        CreateWordField (Arg0, One, IRQ0)
                        FindSetRightBit (IRQ0, Local0)
                        Decrement (Local0)
                        Store (Local0, PRTH) /* \_SB_.PCI0.LPCB.PRTH */
                    }

                    Method (_STA, 0, Serialized)  // _STA: Status
                    {
                        If (And (PRTH, 0x80))
                        {
                            Return (0x09)
                        }
                        Else
                        {
                            Return (0x0B)
                        }
                    }
                }

                Device (EC)
                {
                    Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */)  // _HID: Hardware ID
                    Name (_UID, Zero)  // _UID: Unique ID
                    Name (_GPE, 0x1C)  // _GPE: General Purpose Events
                    Mutex (ECLK, 0x00)
                    OperationRegion (ERAM, EmbeddedControl, Zero, 0x0100)
                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x02), 
                        DKR1,   1, 
                        Offset (0x05), 
                        HSPA,   1, 
                        Offset (0x0C), 
                        LEDS,   8, 
                        Offset (0x0F), 
                            ,   7, 
                        TBSW,   1, 
                        Offset (0x1A), 
                        DKR2,   1, 
                        Offset (0x2A), 
                        EVNT,   8, 
                        Offset (0x30), 
                            ,   6, 
                        ALMT,   1, 
                        Offset (0x3A), 
                        AMUT,   1, 
                            ,   3, 
                        BTEB,   1, 
                        WLEB,   1, 
                        WWEB,   1, 
                        Offset (0x3B), 
                            ,   1, 
                        KBLT,   1, 
                            ,   2, 
                        USPW,   1, 
                        Offset (0x4E), 
                        WAKE,   16, 
                        Offset (0x78), 
                        TMP0,   8, 
                        TMP1,   8, 
                        Offset (0x81), 
                        PAGE,   8, 
                        Offset (0xFE), 
                            ,   4, 
                        DKR3,   1
                    }

                    Method (_CRS, 0, NotSerialized)  // _CRS: Current Resource Settings
                    {
                        Name (ECMD, ResourceTemplate ()
                        {
                            IO (Decode16,
                                0x0062,             // Range Minimum
                                0x0062,             // Range Maximum
                                0x01,               // Alignment
                                0x01,               // Length
                                )
                            IO (Decode16,
                                0x0066,             // Range Minimum
                                0x0066,             // Range Maximum
                                0x01,               // Alignment
                                0x01,               // Length
                                )
                        })
                        Return (ECMD) /* \_SB_.PCI0.LPCB.EC__._CRS.ECMD */
                    }

                    Method (TLED, 1, NotSerialized)
                    {
                        Store (Arg0, LEDS) /* \_SB_.PCI0.LPCB.EC__.LEDS */
                    }

                    Method (LED, 2, NotSerialized)
                    {
                        TLED (Or (Arg0, Arg1))
                    }

                    Method (_INI, 0, NotSerialized)  // _INI: Initialize
                    {
                    }

                    Method (MUTE, 1, NotSerialized)
                    {
                        Store (Arg0, AMUT) /* \_SB_.PCI0.LPCB.EC__.AMUT */
                    }

                    Method (RADI, 1, NotSerialized)
                    {
                        Store (Arg0, WLEB) /* \_SB_.PCI0.LPCB.EC__.WLEB */
                        Store (Arg0, WWEB) /* \_SB_.PCI0.LPCB.EC__.WWEB */
                        Store (Arg0, BTEB) /* \_SB_.PCI0.LPCB.EC__.BTEB */
                    }

                    Method (USBP, 1, NotSerialized)
                    {
                        Store (Arg0, USPW) /* \_SB_.PCI0.LPCB.EC__.USPW */
                    }

                    Method (_Q13, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (SLPB, 0x80) // Status Change
                    }

                    Method (_Q14, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^^^GFX0.INCB ()
                    }

                    Method (_Q15, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^^^GFX0.DECB ()
                    }

                    Method (_Q16, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (GFX0, 0x82) // Device-Specific Change
                    }

                    Method (_Q26, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (AC, 0x80) // Status Change
                    }

                    Method (_Q27, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (AC, 0x80) // Status Change
                        Store (0x50, EVNT) /* \_SB_.PCI0.LPCB.EC__.EVNT */
                    }

                    Method (_Q2A, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (LID, 0x80) // Status Change
                    }

                    Method (_Q2B, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (LID, 0x80) // Status Change
                    }

                    Method (_Q10, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (One)
                    }

                    Method (_Q11, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x02)
                    }

                    Method (_Q12, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x03)
                    }

                    Method (_Q64, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x05)
                    }

                    Method (_Q65, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x06)
                    }

                    Method (_Q17, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x08)
                    }

                    Method (_Q66, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x0A)
                    }

                    Method (_Q6A, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x1B)
                    }

                    Method (_Q1A, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x0B)
                    }

                    Method (_Q1B, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x0C)
                    }

                    Method (_Q62, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x0D)
                    }

                    Method (_Q60, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x0E)
                    }

                    Method (_Q61, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x0F)
                    }

                    Method (_Q1F, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x12)
                    }

                    Method (_Q67, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x13)
                    }

                    Method (_Q63, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x14)
                    }

                    Method (_Q19, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x18)
                    }

                    Method (_Q1C, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x19)
                    }

                    Method (_Q1D, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RHK (0x1A)
                    }

                    Method (_Q5C, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RTAB (0x0B)
                    }

                    Method (_Q5D, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RTAB (0x0C)
                    }

                    Method (_Q5E, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RTAB (0x09)
                    }

                    Method (_Q5F, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        ^HKEY.RTAB (0x0A)
                    }

                    Device (HKEY)
                    {
                        Name (_HID, EisaId ("IBM0068"))  // _HID: Hardware ID
                        Name (BTN, Zero)
                        Name (BTAB, Zero)
                        Name (DHKN, 0x080C)
                        Name (EMSK, Zero)
                        Name (ETAB, Zero)
                        Name (EN, Zero)
                        Method (_STA, 0, NotSerialized)  // _STA: Status
                        {
                            Return (0x0F)
                        }

                        Method (MHKP, 0, NotSerialized)
                        {
                            Store (BTN, Local0)
                            If (LNotEqual (Local0, Zero))
                            {
                                Store (Zero, BTN) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTN_ */
                                Add (Local0, 0x1000, Local0)
                                Return (Local0)
                            }

                            Store (BTAB, Local0)
                            If (LNotEqual (Local0, Zero))
                            {
                                Store (Zero, BTAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTAB */
                                Add (Local0, 0x5000, Local0)
                                Return (Local0)
                            }

                            Return (Zero)
                        }

                        Method (RHK, 1, NotSerialized)
                        {
                            ShiftLeft (One, Subtract (Arg0, One), Local0)
                            If (And (EMSK, Local0))
                            {
                                Store (Arg0, BTN) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTN_ */
                                Notify (HKEY, 0x80) // Status Change
                            }
                        }

                        Method (RTAB, 1, NotSerialized)
                        {
                            ShiftLeft (One, Subtract (Arg0, One), Local0)
                            If (And (ETAB, Local0))
                            {
                                Store (Arg0, BTAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTAB */
                                Notify (HKEY, 0x80) // Status Change
                            }
                        }

                        Method (MHKC, 1, NotSerialized)
                        {
                            If (Arg0)
                            {
                                Store (DHKN, EMSK) /* \_SB_.PCI0.LPCB.EC__.HKEY.EMSK */
                                Store (Ones, ETAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.ETAB */
                            }
                            Else
                            {
                                Store (Zero, EMSK) /* \_SB_.PCI0.LPCB.EC__.HKEY.EMSK */
                                Store (Zero, ETAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.ETAB */
                            }

                            Store (Arg0, EN) /* \_SB_.PCI0.LPCB.EC__.HKEY.EN__ */
                        }

                        Method (MHKM, 2, NotSerialized)
                        {
                            If (LLessEqual (Arg0, 0x20))
                            {
                                ShiftLeft (One, Subtract (Arg0, One), Local0)
                                If (Arg1)
                                {
                                    Or (DHKN, Local0, DHKN) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKN */
                                }
                                Else
                                {
                                    And (DHKN, Not (Local0), DHKN) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKN */
                                }

                                If (EN)
                                {
                                    Store (DHKN, EMSK) /* \_SB_.PCI0.LPCB.EC__.HKEY.EMSK */
                                }
                            }
                        }

                        Method (MHKA, 0, NotSerialized)
                        {
                            Return (0x07FFFFFF)
                        }

                        Method (MHKG, 0, NotSerialized)
                        {
                            Return (ShiftLeft (TBSW, 0x03))
                        }

                        Method (SSMS, 1, NotSerialized)
                        {
                            Store (Arg0, ALMT) /* \_SB_.PCI0.LPCB.EC__.ALMT */
                        }

                        Method (MMTS, 1, NotSerialized)
                        {
                            If (Arg0)
                            {
                                TLED (0x8E)
                            }
                            Else
                            {
                                TLED (0x0E)
                            }
                        }

                        Method (MHKV, 0, NotSerialized)
                        {
                            Return (0x0100)
                        }
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x46), 
                            ,   4, 
                        HPAC,   1
                    }

                    Device (AC)
                    {
                        Name (_HID, "ACPI0003" /* Power Source Device */)  // _HID: Hardware ID
                        Name (_UID, Zero)  // _UID: Unique ID
                        Name (_PCL, Package (0x01)  // _PCL: Power Consumer List
                        {
                            _SB
                        })
                        Method (_PSR, 0, NotSerialized)  // _PSR: Power Source
                        {
                            Return (HPAC) /* \_SB_.PCI0.LPCB.EC__.HPAC */
                        }

                        Method (_STA, 0, NotSerialized)  // _STA: Status
                        {
                            Return (0x0F)
                        }
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x38), 
                        B0ST,   4, 
                            ,   1, 
                        B0CH,   1, 
                        B0DI,   1, 
                        B0PR,   1, 
                        B1ST,   4, 
                            ,   1, 
                        B1CH,   1, 
                        B1DI,   1, 
                        B1PR,   1
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0xA0), 
                        BARC,   16, 
                        BAFC,   16, 
                        Offset (0xA8), 
                        BAPR,   16, 
                        BAVO,   16
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0xA0), 
                            ,   15, 
                        BAMA,   1
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0xA0), 
                        BADC,   16, 
                        BADV,   16, 
                        Offset (0xA6), 
                        Offset (0xA8), 
                        Offset (0xAA), 
                        BASN,   16
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0xA0), 
                        BATY,   32
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0xA0), 
                        BAOE,   128
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0xA0), 
                        BANA,   128
                    }

                    Method (BPAG, 1, NotSerialized)
                    {
                        Store (Arg0, PAGE) /* \_SB_.PCI0.LPCB.EC__.PAGE */
                    }

                    Method (BSTA, 4, NotSerialized)
                    {
                        Acquire (ECLK, 0xFFFF)
                        Store (Zero, Local0)
                        BPAG (Or (One, Arg0))
                        Store (BAMA, Local1)
                        BPAG (Arg0)
                        Store (BAPR, Local2)
                        If (Arg2)
                        {
                            Or (0x02, Local0, Local0)
                        }
                        Else
                        {
                            If (Arg3)
                            {
                                Or (One, Local0, Local0)
                                Subtract (0x00010000, Local2, Local2)
                            }
                            Else
                            {
                                Store (Zero, Local2)
                            }
                        }

                        If (LGreaterEqual (Local2, 0x8000))
                        {
                            Store (Zero, Local2)
                        }

                        Store (Local0, Index (Arg1, Zero))
                        If (Local1)
                        {
                            Multiply (BARC, 0x0A, Index (Arg1, 0x02))
                            Multiply (Local2, BAVO, Local2)
                            Divide (Local2, 0x03E8, , Index (Arg1, One))
                        }
                        Else
                        {
                            Store (BARC, Index (Arg1, 0x02))
                            Store (Local2, Index (Arg1, One))
                        }

                        Store (BAVO, Index (Arg1, 0x03))
                        Release (ECLK)
                        Return (Arg1)
                    }

                    Method (BINF, 2, NotSerialized)
                    {
                        Acquire (ECLK, 0xFFFF)
                        BPAG (Or (One, Arg1))
                        XOr (BAMA, One, Index (Arg0, Zero))
                        Store (BAMA, Local0)
                        BPAG (Arg1)
                        Store (BAFC, Local2)
                        BPAG (Or (0x02, Arg1))
                        Store (BADC, Local1)
                        If (Local0)
                        {
                            Multiply (Local1, 0x0A, Local1)
                            Multiply (Local2, 0x0A, Local2)
                        }

                        Store (Local1, Index (Arg0, One))
                        Store (Local2, Index (Arg0, 0x02))
                        Store (BADV, Index (Arg0, 0x04))
                        Divide (Local2, 0x14, Local0, Index (Arg0, 0x05))
                        Store (BASN, Local0)
                        Name (SERN, Buffer (0x06)
                        {
                            "     "
                        })
                        Store (0x04, Local1)
                        While (Local0)
                        {
                            Divide (Local0, 0x0A, Local2, Local0)
                            Add (Local2, 0x30, Index (SERN, Local1))
                            Decrement (Local1)
                        }

                        Store (SERN, Index (Arg0, 0x0A))
                        BPAG (Or (0x04, Arg1))
                        Name (TYPE, Buffer (0x05)
                        {
                             0x00, 0x00, 0x00, 0x00, 0x00                     /* ..... */
                        })
                        Store (BATY, TYPE) /* \_SB_.PCI0.LPCB.EC__.BINF.TYPE */
                        Store (TYPE, Index (Arg0, 0x0B))
                        BPAG (Or (0x05, Arg1))
                        Store (BAOE, Index (Arg0, 0x0C))
                        BPAG (Or (0x06, Arg1))
                        Store (BANA, Index (Arg0, 0x09))
                        Release (ECLK)
                        Return (Arg0)
                    }

                    Device (BAT0)
                    {
                        Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */)  // _HID: Hardware ID
                        Name (_UID, Zero)  // _UID: Unique ID
                        Name (_PCL, Package (0x01)  // _PCL: Power Consumer List
                        {
                            _SB
                        })
                        Name (BATS, Package (0x0D)
                        {
                            Zero, 
                            0xFFFFFFFF, 
                            0xFFFFFFFF, 
                            One, 
                            0x2A30, 
                            Zero, 
                            0xC8, 
                            One, 
                            One, 
                            "", 
                            "", 
                            "", 
                            ""
                        })
                        Method (_BIF, 0, NotSerialized)  // _BIF: Battery Information
                        {
                            Return (BINF (BATS, Zero))
                        }

                        Name (BATI, Package (0x04)
                        {
                            Zero, 
                            Zero, 
                            Zero, 
                            Zero
                        })
                        Method (_BST, 0, NotSerialized)  // _BST: Battery Status
                        {
                            If (B0PR)
                            {
                                Return (BSTA (Zero, BATI, B0CH, B0DI))
                            }
                            Else
                            {
                                Return (Package (0x04)
                                {
                                    Zero, 
                                    Zero, 
                                    Zero, 
                                    Zero
                                })
                            }
                        }

                        Method (_STA, 0, NotSerialized)  // _STA: Status
                        {
                            If (B0PR)
                            {
                                Return (0x1F)
                            }
                            Else
                            {
                                Return (0x0F)
                            }
                        }
                    }

                    Device (BAT1)
                    {
                        Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */)  // _HID: Hardware ID
                        Name (_UID, Zero)  // _UID: Unique ID
                        Name (_PCL, Package (0x01)  // _PCL: Power Consumer List
                        {
                            _SB
                        })
                        Name (BATS, Package (0x0D)
                        {
                            Zero, 
                            0xFFFFFFFF, 
                            0xFFFFFFFF, 
                            One, 
                            0x2A30, 
                            Zero, 
                            0xC8, 
                            One, 
                            One, 
                            "", 
                            "", 
                            "", 
                            ""
                        })
                        Method (_BIF, 0, NotSerialized)  // _BIF: Battery Information
                        {
                            Return (BINF (BATS, 0x10))
                        }

                        Name (BATI, Package (0x04)
                        {
                            Zero, 
                            Zero, 
                            Zero, 
                            Zero
                        })
                        Method (_BST, 0, NotSerialized)  // _BST: Battery Status
                        {
                            If (B1PR)
                            {
                                Return (BSTA (0x10, BATI, B1CH, B1DI))
                            }
                            Else
                            {
                                Return (Package (0x04)
                                {
                                    Zero, 
                                    Zero, 
                                    Zero, 
                                    Zero
                                })
                            }
                        }

                        Method (_STA, 0, NotSerialized)  // _STA: Status
                        {
                            If (B1PR)
                            {
                                Return (0x1F)
                            }
                            Else
                            {
                                Return (0x0F)
                            }
                        }
                    }

                    Method (_Q24, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (BAT0, 0x80) // Status Change
                    }

                    Method (_Q25, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (BAT1, 0x80) // Status Change
                    }

                    Method (_Q4A, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (BAT0, 0x81) // Information Change
                    }

                    Method (_Q4B, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (BAT0, 0x80) // Status Change
                    }

                    Method (_Q4C, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (BAT1, 0x81) // Information Change
                    }

                    Method (_Q4D, 0, NotSerialized)  // _Qxx: EC Query
                    {
                        Notify (BAT1, 0x80) // Status Change
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x32), 
                            ,   4, 
                        WKFN,   1, 
                        Offset (0x83), 
                        FNKY,   8
                    }

                    Device (SLPB)
                    {
                        Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */)  // _HID: Hardware ID
                        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
                        {
                            Return (Package (0x02)
                            {
                                0x18, 
                                0x03
                            })
                        }

                        Method (_PSW, 1, NotSerialized)  // _PSW: Power State Wake
                        {
                            If (Arg0)
                            {
                                Store (0x06, FNKY) /* \_SB_.PCI0.LPCB.EC__.FNKY */
                                Store (One, WKFN) /* \_SB_.PCI0.LPCB.EC__.WKFN */
                            }
                            Else
                            {
                                Store (Zero, FNKY) /* \_SB_.PCI0.LPCB.EC__.FNKY */
                                Store (Zero, WKFN) /* \_SB_.PCI0.LPCB.EC__.WKFN */
                            }
                        }
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x32), 
                            ,   2, 
                        WKLD,   1, 
                        Offset (0x46), 
                            ,   2, 
                        LIDS,   1
                    }

                    Device (LID)
                    {
                        Name (_HID, "PNP0C0D" /* Lid Device */)  // _HID: Hardware ID
                        Method (_LID, 0, NotSerialized)  // _LID: Lid Status
                        {
                            Return (LIDS) /* \_SB_.PCI0.LPCB.EC__.LIDS */
                        }

                        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
                        {
                            Return (Package (0x02)
                            {
                                0x18, 
                                0x03
                            })
                        }

                        Method (_PSW, 1, NotSerialized)  // _PSW: Power State Wake
                        {
                            If (Arg0)
                            {
                                Store (One, WKLD) /* \_SB_.PCI0.LPCB.EC__.WKLD */
                            }
                            Else
                            {
                                Store (Zero, WKLD) /* \_SB_.PCI0.LPCB.EC__.WKLD */
                            }
                        }
                    }

                    Field (ERAM, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x06), 
                        SNDS,   8
                    }

                    Method (BEEP, 1, NotSerialized)
                    {
                        Store (Arg0, SNDS) /* \_SB_.PCI0.LPCB.EC__.SNDS */
                    }

                    Scope (\_TZ)
                    {
                        Method (C2K, 1, NotSerialized)
                        {
                            Multiply (Arg0, 0x0A, Local0)
                            Add (Local0, 0x0AAC, Local0)
                            If (LLessEqual (Local0, 0x0AAC))
                            {
                                Return (0x0BB8)
                            }

                            If (LGreater (Local0, 0x0FAC))
                            {
                                Return (0x0BB8)
                            }

                            Return (Local0)
                        }

                        ThermalZone (THM0)
                        {
                            Method (_CRT, 0, NotSerialized)  // _CRT: Critical Temperature
                            {
                                Return (C2K (0x7F))
                            }

                            Method (_TMP, 0, NotSerialized)  // _TMP: Temperature
                            {
                                Return (C2K (\_SB.PCI0.LPCB.EC.TMP0))
                            }
                        }

                        ThermalZone (THM1)
                        {
                            Method (_CRT, 0, NotSerialized)  // _CRT: Critical Temperature
                            {
                                Return (C2K (0x63))
                            }

                            Method (_PSV, 0, NotSerialized)  // _PSV: Passive Temperature
                            {
                                Return (C2K (0x5E))
                            }

                            Method (_TMP, 0, NotSerialized)  // _TMP: Temperature
                            {
                                Return (C2K (\_SB.PCI0.LPCB.EC.TMP1))
                            }
                        }
                    }

                    Scope (\_SI)
                    {
                        Method (_SST, 1, NotSerialized)  // _SST: System Status
                        {
                            If (LEqual (Arg0, Zero))
                            {
                                \_SB.PCI0.LPCB.EC.TLED (Zero)
                                \_SB.PCI0.LPCB.EC.TLED (0x07)
                            }

                            If (LEqual (Arg0, One))
                            {
                                \_SB.PCI0.LPCB.EC.TLED (0x80)
                                \_SB.PCI0.LPCB.EC.TLED (0x07)
                            }

                            If (LEqual (Arg0, 0x02))
                            {
                                \_SB.PCI0.LPCB.EC.TLED (0x80)
                                \_SB.PCI0.LPCB.EC.TLED (0xC7)
                            }

                            If (LEqual (Arg0, 0x03))
                            {
                                \_SB.PCI0.LPCB.EC.TLED (0xA0)
                                \_SB.PCI0.LPCB.EC.TLED (0x87)
                            }
                        }
                    }
                }

                Device (DMAC)
                {
                    Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */)  // _HID: Hardware ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IO (Decode16,
                            0x0000,             // Range Minimum
                            0x0000,             // Range Maximum
                            0x01,               // Alignment
                            0x20,               // Length
                            )
                        IO (Decode16,
                            0x0081,             // Range Minimum
                            0x0081,             // Range Maximum
                            0x01,               // Alignment
                            0x11,               // Length
                            )
                        IO (Decode16,
                            0x0093,             // Range Minimum
                            0x0093,             // Range Maximum
                            0x01,               // Alignment
                            0x0D,               // Length
                            )
                        IO (Decode16,
                            0x00C0,             // Range Minimum
                            0x00C0,             // Range Maximum
                            0x01,               // Alignment
                            0x20,               // Length
                            )
                        DMA (Compatibility, NotBusMaster, Transfer8_16, )
                            {4}
                    })
                }

                Device (FWH)
                {
                    Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */)  // _HID: Hardware ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        Memory32Fixed (ReadOnly,
                            0xFF000000,         // Address Base
                            0x01000000,         // Address Length
                            )
                    })
                }

                Device (HPET)
                {
                    Name (_HID, EisaId ("PNP0103") /* HPET System Timer */)  // _HID: Hardware ID
                    Name (_CID, EisaId ("PNP0C01") /* System Board */)  // _CID: Compatible ID
                    Name (BUF0, ResourceTemplate ()
                    {
                        Memory32Fixed (ReadOnly,
                            0xFED00000,         // Address Base
                            0x00000400,         // Address Length
                            _Y01)
                    })
                    Method (_STA, 0, NotSerialized)  // _STA: Status
                    {
                        If (HPTE)
                        {
                            If (LGreaterEqual (OSYS, 0x07D1))
                            {
                                Return (0x0F)
                            }
                            Else
                            {
                                Return (0x0B)
                            }
                        }

                        Return (Zero)
                    }

                    Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
                    {
                        If (HPTE)
                        {
                            CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y01._BAS, HPT0)  // _BAS: Base Address
                            If (LEqual (HPAS, One))
                            {
                                Store (0xFED01000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
                            }

                            If (LEqual (HPAS, 0x02))
                            {
                                Store (0xFED02000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
                            }

                            If (LEqual (HPAS, 0x03))
                            {
                                Store (0xFED03000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
                            }
                        }

                        Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */
                    }
                }

                Device (PIC)
                {
                    Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */)  // _HID: Hardware ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IO (Decode16,
                            0x0020,             // Range Minimum
                            0x0020,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x0024,             // Range Minimum
                            0x0024,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x0028,             // Range Minimum
                            0x0028,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x002C,             // Range Minimum
                            0x002C,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x0030,             // Range Minimum
                            0x0030,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x0034,             // Range Minimum
                            0x0034,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x0038,             // Range Minimum
                            0x0038,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x003C,             // Range Minimum
                            0x003C,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00A0,             // Range Minimum
                            0x00A0,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00A4,             // Range Minimum
                            0x00A4,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00A8,             // Range Minimum
                            0x00A8,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00AC,             // Range Minimum
                            0x00AC,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00B0,             // Range Minimum
                            0x00B0,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00B4,             // Range Minimum
                            0x00B4,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00B8,             // Range Minimum
                            0x00B8,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x00BC,             // Range Minimum
                            0x00BC,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x04D0,             // Range Minimum
                            0x04D0,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IRQNoFlags ()
                            {2}
                    })
                }

                Device (MATH)
                {
                    Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */)  // _HID: Hardware ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IO (Decode16,
                            0x00F0,             // Range Minimum
                            0x00F0,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IRQNoFlags ()
                            {13}
                    })
                }

                Device (LDRC)
                {
                    Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */)  // _HID: Hardware ID
                    Name (_UID, 0x02)  // _UID: Unique ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IO (Decode16,
                            0x002E,             // Range Minimum
                            0x002E,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x004E,             // Range Minimum
                            0x004E,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x0061,             // Range Minimum
                            0x0061,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IO (Decode16,
                            0x0063,             // Range Minimum
                            0x0063,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IO (Decode16,
                            0x0065,             // Range Minimum
                            0x0065,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IO (Decode16,
                            0x0067,             // Range Minimum
                            0x0067,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IO (Decode16,
                            0x0080,             // Range Minimum
                            0x0080,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IO (Decode16,
                            0x0092,             // Range Minimum
                            0x0092,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IO (Decode16,
                            0x00B2,             // Range Minimum
                            0x00B2,             // Range Maximum
                            0x01,               // Alignment
                            0x02,               // Length
                            )
                        IO (Decode16,
                            0x0800,             // Range Minimum
                            0x0800,             // Range Maximum
                            0x01,               // Alignment
                            0x10,               // Length
                            )
                        IO (Decode16,
                            0x0500,             // Range Minimum
                            0x0500,             // Range Maximum
                            0x01,               // Alignment
                            0x80,               // Length
                            )
                        IO (Decode16,
                            0x0480,             // Range Minimum
                            0x0480,             // Range Maximum
                            0x01,               // Alignment
                            0x40,               // Length
                            )
                    })
                }

                Device (RTC)
                {
                    Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */)  // _HID: Hardware ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IO (Decode16,
                            0x0070,             // Range Minimum
                            0x0070,             // Range Maximum
                            0x01,               // Alignment
                            0x08,               // Length
                            )
                    })
                }

                Device (TIMR)
                {
                    Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */)  // _HID: Hardware ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IO (Decode16,
                            0x0040,             // Range Minimum
                            0x0040,             // Range Maximum
                            0x01,               // Alignment
                            0x04,               // Length
                            )
                        IO (Decode16,
                            0x0050,             // Range Minimum
                            0x0050,             // Range Maximum
                            0x10,               // Alignment
                            0x04,               // Length
                            )
                        IRQNoFlags ()
                            {0}
                    })
                }

                Device (PS2K)
                {
                    Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */)  // _HID: Hardware ID
                    Name (_CID, EisaId ("PNP030B"))  // _CID: Compatible ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IO (Decode16,
                            0x0060,             // Range Minimum
                            0x0060,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IO (Decode16,
                            0x0064,             // Range Minimum
                            0x0064,             // Range Maximum
                            0x01,               // Alignment
                            0x01,               // Length
                            )
                        IRQ (Edge, ActiveHigh, Exclusive, )
                            {1}
                    })
                    Method (_STA, 0, NotSerialized)  // _STA: Status
                    {
                        Return (0x0F)
                    }
                }

                Device (PS2M)
                {
                    Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */)  // _HID: Hardware ID
                    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
                    {
                        IRQ (Edge, ActiveHigh, Exclusive, )
                            {12}
                    })
                    Method (_STA, 0, NotSerialized)  // _STA: Status
                    {
                        Return (0x0F)
                    }
                }
            }

            Device (PATA)
            {
                Name (_ADR, 0x001F0001)  // _ADR: Address
                Device (PRID)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_GTM, 0, NotSerialized)  // _GTM: Get Timing Mode
                    {
                        Name (PBUF, Buffer (0x14)
                        {
                            /* 0000 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  /* ........ */
                            /* 0008 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  /* ........ */
                            /* 0010 */  0x00, 0x00, 0x00, 0x00                           /* .... */
                        })
                        CreateDWordField (PBUF, Zero, PIO0)
                        CreateDWordField (PBUF, 0x04, DMA0)
                        CreateDWordField (PBUF, 0x08, PIO1)
                        CreateDWordField (PBUF, 0x0C, DMA1)
                        CreateDWordField (PBUF, 0x10, FLAG)
                        Return (PBUF) /* \_SB_.PCI0.PATA.PRID._GTM.PBUF */
                    }

                    Method (_STM, 3, NotSerialized)  // _STM: Set Timing Mode
                    {
                        CreateDWordField (Arg0, Zero, PIO0)
                        CreateDWordField (Arg0, 0x04, DMA0)
                        CreateDWordField (Arg0, 0x08, PIO1)
                        CreateDWordField (Arg0, 0x0C, DMA1)
                        CreateDWordField (Arg0, 0x10, FLAG)
                    }

                    Device (DSK0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                    }

                    Device (DSK1)
                    {
                        Name (_ADR, One)  // _ADR: Address
                    }
                }
            }

            Device (SATA)
            {
                Name (_ADR, 0x001F0002)  // _ADR: Address
                Device (PRID)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_GTM, 0, NotSerialized)  // _GTM: Get Timing Mode
                    {
                        Name (PBUF, Buffer (0x14)
                        {
                            /* 0000 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  /* ........ */
                            /* 0008 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  /* ........ */
                            /* 0010 */  0x00, 0x00, 0x00, 0x00                           /* .... */
                        })
                        CreateDWordField (PBUF, Zero, PIO0)
                        CreateDWordField (PBUF, 0x04, DMA0)
                        CreateDWordField (PBUF, 0x08, PIO1)
                        CreateDWordField (PBUF, 0x0C, DMA1)
                        CreateDWordField (PBUF, 0x10, FLAG)
                        Return (PBUF) /* \_SB_.PCI0.SATA.PRID._GTM.PBUF */
                    }

                    Method (_STM, 3, NotSerialized)  // _STM: Set Timing Mode
                    {
                        CreateDWordField (Arg0, Zero, PIO0)
                        CreateDWordField (Arg0, 0x04, DMA0)
                        CreateDWordField (Arg0, 0x08, PIO1)
                        CreateDWordField (Arg0, 0x0C, DMA1)
                        CreateDWordField (Arg0, 0x10, FLAG)
                    }

                    Device (DSK0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                    }

                    Device (DSK1)
                    {
                        Name (_ADR, One)  // _ADR: Address
                    }
                }
            }

            Device (SBUS)
            {
                Name (_ADR, 0x001F0003)  // _ADR: Address
            }
        }
    }

    Name (_S0, Package (0x04)  // _S0_: S0 System State
    {
        Zero, 
        Zero, 
        Zero, 
        Zero
    })
    Name (_S3, Package (0x04)  // _S3_: S3 System State
    {
        0x05, 
        0x05, 
        Zero, 
        Zero
    })
    Name (_S4, Package (0x04)  // _S4_: S4 System State
    {
        0x06, 
        0x06, 
        Zero, 
        Zero
    })
    Name (_S5, Package (0x04)  // _S5_: S5 System State
    {
        0x07, 
        0x07, 
        Zero, 
        Zero
    })
    Scope (_SB)
    {
        OperationRegion (DLPC, SystemIO, 0x164C, One)
        Field (DLPC, ByteAcc, NoLock, Preserve)
        {
                ,   3, 
            DSTA,   1
        }

        Device (DOCK)
        {
            Name (_HID, "ACPI0003" /* Power Source Device */)  // _HID: Hardware ID
            Name (_UID, Zero)  // _UID: Unique ID
            Name (_PCL, Package (0x01)  // _PCL: Power Consumer List
            {
                _SB
            })
            Method (_DCK, 1, NotSerialized)  // _DCK: Dock Present
            {
                If (Arg0)
                {
                    TRAP (One)
                }
                Else
                {
                    TRAP (0x02)
                }

                XOr (Arg0, DSTA, Local0)
                Return (Local0)
            }

            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                Return (DSTA) /* \_SB_.DSTA */
            }
        }
    }

    Scope (_SB.PCI0.LPCB.EC)
    {
        Method (_Q18, 0, NotSerialized)  // _Qxx: EC Query
        {
            Notify (DOCK, 0x03) // Eject Request
        }

        Method (_Q50, 0, NotSerialized)  // _Qxx: EC Query
        {
            Notify (DOCK, 0x03) // Eject Request
        }

        Method (_Q58, 0, NotSerialized)  // _Qxx: EC Query
        {
            Notify (DOCK, Zero) // Bus Check
        }
    }
}


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [Regression Linux 4.11] TPM module not loaded anymore  (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
  2017-04-09 17:34             ` [Regression Linux 4.11] TPM module not loaded anymore (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot) Paul Menzel
@ 2017-04-11 22:57               ` Jarkko Sakkinen
  2017-04-12 15:46                 ` Moore, Robert
                                   ` (2 more replies)
  0 siblings, 3 replies; 20+ messages in thread
From: Jarkko Sakkinen @ 2017-04-11 22:57 UTC (permalink / raw)
  To: Paul Menzel
  Cc: Bob Moore, Maciej S. Szmigiero, linux-kernel, Arthur Heymans,
	tpmdd-devel, GNUtoo, Lv Zheng, Rafael J. Wysocki

On Sun, Apr 09, 2017 at 07:34:43PM +0200, Paul Menzel wrote:
> Dear Linux folks,
> 
> 
> It turns out that stricter checks in the ACPI subsystem, introduced in
> commit 57707a9a77 (ACPICA: Resources: Not a valid resource if buffer
> length too long) [1], cause the TPM module not to be loaded anymore on
> the Lenovo X60 with coreboot [2].
> 
> Am Freitag, den 07.04.2017, 22:58 +0200 schrieb Paul Menzel:
> > On 2017-04-07 22:13, Jarkko Sakkinen wrote:
> > > On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote:
> > >> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
> > >> > >We added direct ACPI binding to the driver in addition to PNP, so if
> > >> > >you have an ACPI table it goes down that path and does some additional
> > >> > >validation of what is in the TPM. The BIOS must provide a
> > >> > >acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a
> > >> > >minimum.
> > >> >
> > >> > Is it correct, that this is added in/for 4.11, so just recently? Testing
> > >> > with Linux 4.10.8, everything is detected just fine.
> > >> 
> > >> No, it is quite a bit older.. And it should only go for TPM2, which I
> > >> don't think you have??
> > >> 
> > >> Maybe Jarkko has a guess, but sure sounds like something is recently
> > >> broken in 4.11
> > > 
> > > I'll come back to this. I have to re-read the whole mail thread to
> > > get back into the context. Lots of multitasking because of release
> > > and so forth. Sorry for the latency!
> > 
> > I started bisecting this issue. This is the current state.
> 
> […]
> 
> Here are the results.
> 
> ```
> git bisect log
> # bad: [7a771ceac771d009f7203c40b256b0608d7ea2f8] Merge tag 'dm-4.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm
> # good: [c470abd4fde40ea6a0846a2beab642a578c0b8cd] Linux 4.10
> git bisect start 'HEAD' 'v4.10'
> # good: [b3de5ad688f0f52457e73767f95a640ab4158d0d] Merge tag 'regmap-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
> git bisect good b3de5ad688f0f52457e73767f95a640ab4158d0d
> # bad: [fd4a61e08aa79f2b7835b25c6f94f27bd2d65990] sched/core: Fix build paravirt build on arm and arm64
> git bisect bad fd4a61e08aa79f2b7835b25c6f94f27bd2d65990
> # good: [7aa7d608112baf63a0b1278955f9619427373807] Merge tag 'leds_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds
> git bisect good 7aa7d608112baf63a0b1278955f9619427373807
> # good: [02c3de1105228e367320e7fdeffbf511904f398c] Merge tag 'pm-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
> git bisect good 02c3de1105228e367320e7fdeffbf511904f398c
> # bad: [6c24337f22115d669e24ce990842dab667371b4d] Merge tag 'fscrypt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt
> git bisect bad 6c24337f22115d669e24ce990842dab667371b4d
> # bad: [a74d1cafc22e100a9b59c50943ca09c37e03dce8] Merge branches 'acpi-bus', 'acpi-sleep' and 'acpi-processor'
> git bisect bad a74d1cafc22e100a9b59c50943ca09c37e03dce8
> # bad: [ce87e09dd88c61f9088768a7708828423549725c] ACPICA: Parser: Allow method invocations as target operands
> git bisect bad ce87e09dd88c61f9088768a7708828423549725c
> # good: [0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076] ACPICA: Hardware: Add sleep register hooks
> git bisect good 0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076
> # good: [a654b8ca6d28736995de767ba62e801fd806a3b2] ACPICA: Disassembler: Add Switch/Case disassembly support
> git bisect good a654b8ca6d28736995de767ba62e801fd806a3b2
> # bad: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources: Not a valid resource if buffer length too long
> git bisect bad 57707a9a7780fab426b8ae9b4c7b65b912a748b3
> # good: [7225d0467c59e55566df396d6ecd5baf26ef3d9b] ACPICA: Utilities: Update debug output
> git bisect good 7225d0467c59e55566df396d6ecd5baf26ef3d9b
> # first bad commit: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources: Not a valid resource if buffer length too long
> ```
> 
> I suggest, that just a warning is printed in this case, or that an
> option is added to enable some kind of “strict mode” or a quirk table.
> 
> Please find the decompiled DSDT attached. The code to generate the ASL
> coreboot code is available [3].
> 
> Please tell me, what information you need.
> 
> 
> Kind regards,
> 
> Paul
> 
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=57707a9a778
> [2] https://review.coreboot.org/13410/
> [3] https://review.coreboot.org/cgit/coreboot.git/tree/src/drivers/pc80/tpm/tpm.c

Hi,

Thank you for bisecting the issue. It would have been hard to achieve this
without the hardware. Do you want to create a patch for ACPICA?

/Jarkko

^ permalink raw reply	[flat|nested] 20+ messages in thread

* RE: [Regression Linux 4.11] TPM module not loaded anymore  (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
  2017-04-11 22:57               ` Jarkko Sakkinen
@ 2017-04-12 15:46                 ` Moore, Robert
  2017-04-12 15:52                 ` Moore, Robert
  2017-04-12 15:54                 ` Moore, Robert
  2 siblings, 0 replies; 20+ messages in thread
From: Moore, Robert @ 2017-04-12 15:46 UTC (permalink / raw)
  To: Jarkko Sakkinen, Paul Menzel
  Cc: Maciej S. Szmigiero, linux-kernel, Arthur Heymans, tpmdd-devel,
	GNUtoo, Zheng, Lv, Wysocki, Rafael J

I'll try to look at it today
Bob


> -----Original Message-----
> From: Jarkko Sakkinen [mailto:jarkko.sakkinen@linux.intel.com]
> Sent: Tuesday, April 11, 2017 3:58 PM
> To: Paul Menzel <pmenzel@molgen.mpg.de>
> Cc: Moore, Robert <robert.moore@intel.com>; Maciej S. Szmigiero
> <mail@maciej.szmigiero.name>; linux-kernel@vger.kernel.org; Arthur
> Heymans <arthur@aheymans.xyz>; tpmdd-devel@lists.sourceforge.net;
> GNUtoo@no-log.org; Zheng, Lv <lv.zheng@intel.com>; Wysocki, Rafael J
> <rafael.j.wysocki@intel.com>
> Subject: Re: [Regression Linux 4.11] TPM module not loaded anymore (was:
> Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
> 
> On Sun, Apr 09, 2017 at 07:34:43PM +0200, Paul Menzel wrote:
> > Dear Linux folks,
> >
> >
> > It turns out that stricter checks in the ACPI subsystem, introduced in
> > commit 57707a9a77 (ACPICA: Resources: Not a valid resource if buffer
> > length too long) [1], cause the TPM module not to be loaded anymore on
> > the Lenovo X60 with coreboot [2].
> >
> > Am Freitag, den 07.04.2017, 22:58 +0200 schrieb Paul Menzel:
> > > On 2017-04-07 22:13, Jarkko Sakkinen wrote:
> > > > On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote:
> > > >> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
> > > >> > >We added direct ACPI binding to the driver in addition to PNP,
> > > >> > >so if you have an ACPI table it goes down that path and does
> > > >> > >some additional validation of what is in the TPM. The BIOS
> > > >> > >must provide a acpi_dev_resource_memory and a ACPI_SIG_TPM2
> > > >> > >for the ACPI entry at a minimum.
> > > >> >
> > > >> > Is it correct, that this is added in/for 4.11, so just
> > > >> > recently? Testing with Linux 4.10.8, everything is detected
> just fine.
> > > >>
> > > >> No, it is quite a bit older.. And it should only go for TPM2,
> > > >> which I don't think you have??
> > > >>
> > > >> Maybe Jarkko has a guess, but sure sounds like something is
> > > >> recently broken in 4.11
> > > >
> > > > I'll come back to this. I have to re-read the whole mail thread to
> > > > get back into the context. Lots of multitasking because of release
> > > > and so forth. Sorry for the latency!
> > >
> > > I started bisecting this issue. This is the current state.
> >
> > […]
> >
> > Here are the results.
> >
> > ```
> > git bisect log
> > # bad: [7a771ceac771d009f7203c40b256b0608d7ea2f8] Merge tag
> > 'dm-4.11-changes' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm
> > # good: [c470abd4fde40ea6a0846a2beab642a578c0b8cd] Linux 4.10 git
> > bisect start 'HEAD' 'v4.10'
> > # good: [b3de5ad688f0f52457e73767f95a640ab4158d0d] Merge tag
> > 'regmap-v4.11' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
> > git bisect good b3de5ad688f0f52457e73767f95a640ab4158d0d
> > # bad: [fd4a61e08aa79f2b7835b25c6f94f27bd2d65990] sched/core: Fix
> > build paravirt build on arm and arm64 git bisect bad
> > fd4a61e08aa79f2b7835b25c6f94f27bd2d65990
> > # good: [7aa7d608112baf63a0b1278955f9619427373807] Merge tag
> > 'leds_for_4.11' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds
> > git bisect good 7aa7d608112baf63a0b1278955f9619427373807
> > # good: [02c3de1105228e367320e7fdeffbf511904f398c] Merge tag
> > 'pm-4.11-rc1' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
> > git bisect good 02c3de1105228e367320e7fdeffbf511904f398c
> > # bad: [6c24337f22115d669e24ce990842dab667371b4d] Merge tag
> > 'fscrypt-for-linus' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt
> > git bisect bad 6c24337f22115d669e24ce990842dab667371b4d
> > # bad: [a74d1cafc22e100a9b59c50943ca09c37e03dce8] Merge branches
> 'acpi-bus', 'acpi-sleep' and 'acpi-processor'
> > git bisect bad a74d1cafc22e100a9b59c50943ca09c37e03dce8
> > # bad: [ce87e09dd88c61f9088768a7708828423549725c] ACPICA: Parser:
> > Allow method invocations as target operands git bisect bad
> > ce87e09dd88c61f9088768a7708828423549725c
> > # good: [0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076] ACPICA: Hardware:
> > Add sleep register hooks git bisect good
> > 0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076
> > # good: [a654b8ca6d28736995de767ba62e801fd806a3b2] ACPICA:
> > Disassembler: Add Switch/Case disassembly support git bisect good
> > a654b8ca6d28736995de767ba62e801fd806a3b2
> > # bad: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources:
> > Not a valid resource if buffer length too long git bisect bad
> > 57707a9a7780fab426b8ae9b4c7b65b912a748b3
> > # good: [7225d0467c59e55566df396d6ecd5baf26ef3d9b] ACPICA: Utilities:
> > Update debug output git bisect good
> > 7225d0467c59e55566df396d6ecd5baf26ef3d9b
> > # first bad commit: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA:
> > Resources: Not a valid resource if buffer length too long ```
> >
> > I suggest, that just a warning is printed in this case, or that an
> > option is added to enable some kind of “strict mode” or a quirk table.
> >
> > Please find the decompiled DSDT attached. The code to generate the ASL
> > coreboot code is available [3].
> >
> > Please tell me, what information you need.
> >
> >
> > Kind regards,
> >
> > Paul
> >
> >
> > [1]
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/com
> > mit/?id=57707a9a778 [2] https://review.coreboot.org/13410/
> > [3]
> > https://review.coreboot.org/cgit/coreboot.git/tree/src/drivers/pc80/tp
> > m/tpm.c
> 
> Hi,
> 
> Thank you for bisecting the issue. It would have been hard to achieve
> this without the hardware. Do you want to create a patch for ACPICA?
> 
> /Jarkko

^ permalink raw reply	[flat|nested] 20+ messages in thread

* RE: [Regression Linux 4.11] TPM module not loaded anymore  (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
  2017-04-11 22:57               ` Jarkko Sakkinen
  2017-04-12 15:46                 ` Moore, Robert
@ 2017-04-12 15:52                 ` Moore, Robert
  2017-04-12 15:54                 ` Moore, Robert
  2 siblings, 0 replies; 20+ messages in thread
From: Moore, Robert @ 2017-04-12 15:52 UTC (permalink / raw)
  To: Jarkko Sakkinen, Paul Menzel
  Cc: Maciej S. Szmigiero, linux-kernel, Arthur Heymans, tpmdd-devel,
	GNUtoo, Zheng, Lv, Wysocki, Rafael J

Please post the acpidump for this machine so we can analyze the actual AML byte code.
Thanks.


> -----Original Message-----
> From: Jarkko Sakkinen [mailto:jarkko.sakkinen@linux.intel.com]
> Sent: Tuesday, April 11, 2017 3:58 PM
> To: Paul Menzel <pmenzel@molgen.mpg.de>
> Cc: Moore, Robert <robert.moore@intel.com>; Maciej S. Szmigiero
> <mail@maciej.szmigiero.name>; linux-kernel@vger.kernel.org; Arthur
> Heymans <arthur@aheymans.xyz>; tpmdd-devel@lists.sourceforge.net;
> GNUtoo@no-log.org; Zheng, Lv <lv.zheng@intel.com>; Wysocki, Rafael J
> <rafael.j.wysocki@intel.com>
> Subject: Re: [Regression Linux 4.11] TPM module not loaded anymore (was:
> Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
> 
> On Sun, Apr 09, 2017 at 07:34:43PM +0200, Paul Menzel wrote:
> > Dear Linux folks,
> >
> >
> > It turns out that stricter checks in the ACPI subsystem, introduced in
> > commit 57707a9a77 (ACPICA: Resources: Not a valid resource if buffer
> > length too long) [1], cause the TPM module not to be loaded anymore on
> > the Lenovo X60 with coreboot [2].
> >
> > Am Freitag, den 07.04.2017, 22:58 +0200 schrieb Paul Menzel:
> > > On 2017-04-07 22:13, Jarkko Sakkinen wrote:
> > > > On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote:
> > > >> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
> > > >> > >We added direct ACPI binding to the driver in addition to PNP,
> > > >> > >so if you have an ACPI table it goes down that path and does
> > > >> > >some additional validation of what is in the TPM. The BIOS
> > > >> > >must provide a acpi_dev_resource_memory and a ACPI_SIG_TPM2
> > > >> > >for the ACPI entry at a minimum.
> > > >> >
> > > >> > Is it correct, that this is added in/for 4.11, so just
> > > >> > recently? Testing with Linux 4.10.8, everything is detected
> just fine.
> > > >>
> > > >> No, it is quite a bit older.. And it should only go for TPM2,
> > > >> which I don't think you have??
> > > >>
> > > >> Maybe Jarkko has a guess, but sure sounds like something is
> > > >> recently broken in 4.11
> > > >
> > > > I'll come back to this. I have to re-read the whole mail thread to
> > > > get back into the context. Lots of multitasking because of release
> > > > and so forth. Sorry for the latency!
> > >
> > > I started bisecting this issue. This is the current state.
> >
> > […]
> >
> > Here are the results.
> >
> > ```
> > git bisect log
> > # bad: [7a771ceac771d009f7203c40b256b0608d7ea2f8] Merge tag
> > 'dm-4.11-changes' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm
> > # good: [c470abd4fde40ea6a0846a2beab642a578c0b8cd] Linux 4.10 git
> > bisect start 'HEAD' 'v4.10'
> > # good: [b3de5ad688f0f52457e73767f95a640ab4158d0d] Merge tag
> > 'regmap-v4.11' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
> > git bisect good b3de5ad688f0f52457e73767f95a640ab4158d0d
> > # bad: [fd4a61e08aa79f2b7835b25c6f94f27bd2d65990] sched/core: Fix
> > build paravirt build on arm and arm64 git bisect bad
> > fd4a61e08aa79f2b7835b25c6f94f27bd2d65990
> > # good: [7aa7d608112baf63a0b1278955f9619427373807] Merge tag
> > 'leds_for_4.11' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds
> > git bisect good 7aa7d608112baf63a0b1278955f9619427373807
> > # good: [02c3de1105228e367320e7fdeffbf511904f398c] Merge tag
> > 'pm-4.11-rc1' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
> > git bisect good 02c3de1105228e367320e7fdeffbf511904f398c
> > # bad: [6c24337f22115d669e24ce990842dab667371b4d] Merge tag
> > 'fscrypt-for-linus' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt
> > git bisect bad 6c24337f22115d669e24ce990842dab667371b4d
> > # bad: [a74d1cafc22e100a9b59c50943ca09c37e03dce8] Merge branches
> 'acpi-bus', 'acpi-sleep' and 'acpi-processor'
> > git bisect bad a74d1cafc22e100a9b59c50943ca09c37e03dce8
> > # bad: [ce87e09dd88c61f9088768a7708828423549725c] ACPICA: Parser:
> > Allow method invocations as target operands git bisect bad
> > ce87e09dd88c61f9088768a7708828423549725c
> > # good: [0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076] ACPICA: Hardware:
> > Add sleep register hooks git bisect good
> > 0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076
> > # good: [a654b8ca6d28736995de767ba62e801fd806a3b2] ACPICA:
> > Disassembler: Add Switch/Case disassembly support git bisect good
> > a654b8ca6d28736995de767ba62e801fd806a3b2
> > # bad: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources:
> > Not a valid resource if buffer length too long git bisect bad
> > 57707a9a7780fab426b8ae9b4c7b65b912a748b3
> > # good: [7225d0467c59e55566df396d6ecd5baf26ef3d9b] ACPICA: Utilities:
> > Update debug output git bisect good
> > 7225d0467c59e55566df396d6ecd5baf26ef3d9b
> > # first bad commit: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA:
> > Resources: Not a valid resource if buffer length too long ```
> >
> > I suggest, that just a warning is printed in this case, or that an
> > option is added to enable some kind of “strict mode” or a quirk table.
> >
> > Please find the decompiled DSDT attached. The code to generate the ASL
> > coreboot code is available [3].
> >
> > Please tell me, what information you need.
> >
> >
> > Kind regards,
> >
> > Paul
> >
> >
> > [1]
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/com
> > mit/?id=57707a9a778 [2] https://review.coreboot.org/13410/
> > [3]
> > https://review.coreboot.org/cgit/coreboot.git/tree/src/drivers/pc80/tp
> > m/tpm.c
> 
> Hi,
> 
> Thank you for bisecting the issue. It would have been hard to achieve
> this without the hardware. Do you want to create a patch for ACPICA?
> 
> /Jarkko

^ permalink raw reply	[flat|nested] 20+ messages in thread

* RE: [Regression Linux 4.11] TPM module not loaded anymore  (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
  2017-04-11 22:57               ` Jarkko Sakkinen
  2017-04-12 15:46                 ` Moore, Robert
  2017-04-12 15:52                 ` Moore, Robert
@ 2017-04-12 15:54                 ` Moore, Robert
  2017-04-12 21:26                   ` [Regression Linux 4.11] TPM module not loaded anymore Paul Menzel
  2 siblings, 1 reply; 20+ messages in thread
From: Moore, Robert @ 2017-04-12 15:54 UTC (permalink / raw)
  To: Jarkko Sakkinen, Paul Menzel
  Cc: Maciej S. Szmigiero, linux-kernel, Arthur Heymans, tpmdd-devel,
	GNUtoo, Zheng, Lv, Wysocki, Rafael J

And probably the dmesg if error messages appear in there.


> -----Original Message-----
> From: Moore, Robert
> Sent: Wednesday, April 12, 2017 8:53 AM
> To: 'Jarkko Sakkinen' <jarkko.sakkinen@linux.intel.com>; Paul Menzel
> <pmenzel@molgen.mpg.de>
> Cc: Maciej S. Szmigiero <mail@maciej.szmigiero.name>; linux-
> kernel@vger.kernel.org; Arthur Heymans <arthur@aheymans.xyz>; tpmdd-
> devel@lists.sourceforge.net; GNUtoo@no-log.org; Zheng, Lv
> <lv.zheng@intel.com>; Wysocki, Rafael J <rafael.j.wysocki@intel.com>
> Subject: RE: [Regression Linux 4.11] TPM module not loaded anymore (was:
> Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
> 
> Please post the acpidump for this machine so we can analyze the actual
> AML byte code.
> Thanks.
> 
> 
> > -----Original Message-----
> > From: Jarkko Sakkinen [mailto:jarkko.sakkinen@linux.intel.com]
> > Sent: Tuesday, April 11, 2017 3:58 PM
> > To: Paul Menzel <pmenzel@molgen.mpg.de>
> > Cc: Moore, Robert <robert.moore@intel.com>; Maciej S. Szmigiero
> > <mail@maciej.szmigiero.name>; linux-kernel@vger.kernel.org; Arthur
> > Heymans <arthur@aheymans.xyz>; tpmdd-devel@lists.sourceforge.net;
> > GNUtoo@no-log.org; Zheng, Lv <lv.zheng@intel.com>; Wysocki, Rafael J
> > <rafael.j.wysocki@intel.com>
> > Subject: Re: [Regression Linux 4.11] TPM module not loaded anymore
> (was:
> > Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot)
> >
> > On Sun, Apr 09, 2017 at 07:34:43PM +0200, Paul Menzel wrote:
> > > Dear Linux folks,
> > >
> > >
> > > It turns out that stricter checks in the ACPI subsystem, introduced
> > > in commit 57707a9a77 (ACPICA: Resources: Not a valid resource if
> > > buffer length too long) [1], cause the TPM module not to be loaded
> > > anymore on the Lenovo X60 with coreboot [2].
> > >
> > > Am Freitag, den 07.04.2017, 22:58 +0200 schrieb Paul Menzel:
> > > > On 2017-04-07 22:13, Jarkko Sakkinen wrote:
> > > > > On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote:
> > > > >> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote:
> > > > >> > >We added direct ACPI binding to the driver in addition to
> > > > >> > >PNP, so if you have an ACPI table it goes down that path and
> > > > >> > >does some additional validation of what is in the TPM. The
> > > > >> > >BIOS must provide a acpi_dev_resource_memory and a
> > > > >> > >ACPI_SIG_TPM2 for the ACPI entry at a minimum.
> > > > >> >
> > > > >> > Is it correct, that this is added in/for 4.11, so just
> > > > >> > recently? Testing with Linux 4.10.8, everything is detected
> > just fine.
> > > > >>
> > > > >> No, it is quite a bit older.. And it should only go for TPM2,
> > > > >> which I don't think you have??
> > > > >>
> > > > >> Maybe Jarkko has a guess, but sure sounds like something is
> > > > >> recently broken in 4.11
> > > > >
> > > > > I'll come back to this. I have to re-read the whole mail thread
> > > > > to get back into the context. Lots of multitasking because of
> > > > > release and so forth. Sorry for the latency!
> > > >
> > > > I started bisecting this issue. This is the current state.
> > >
> > > […]
> > >
> > > Here are the results.
> > >
> > > ```
> > > git bisect log
> > > # bad: [7a771ceac771d009f7203c40b256b0608d7ea2f8] Merge tag
> > > 'dm-4.11-changes' of
> > > git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm
> > > # good: [c470abd4fde40ea6a0846a2beab642a578c0b8cd] Linux 4.10 git
> > > bisect start 'HEAD' 'v4.10'
> > > # good: [b3de5ad688f0f52457e73767f95a640ab4158d0d] Merge tag
> > > 'regmap-v4.11' of
> > > git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
> > > git bisect good b3de5ad688f0f52457e73767f95a640ab4158d0d
> > > # bad: [fd4a61e08aa79f2b7835b25c6f94f27bd2d65990] sched/core: Fix
> > > build paravirt build on arm and arm64 git bisect bad
> > > fd4a61e08aa79f2b7835b25c6f94f27bd2d65990
> > > # good: [7aa7d608112baf63a0b1278955f9619427373807] Merge tag
> > > 'leds_for_4.11' of
> > > git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-led
> > > s git bisect good 7aa7d608112baf63a0b1278955f9619427373807
> > > # good: [02c3de1105228e367320e7fdeffbf511904f398c] Merge tag
> > > 'pm-4.11-rc1' of
> > > git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
> > > git bisect good 02c3de1105228e367320e7fdeffbf511904f398c
> > > # bad: [6c24337f22115d669e24ce990842dab667371b4d] Merge tag
> > > 'fscrypt-for-linus' of
> > > git://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt
> > > git bisect bad 6c24337f22115d669e24ce990842dab667371b4d
> > > # bad: [a74d1cafc22e100a9b59c50943ca09c37e03dce8] Merge branches
> > 'acpi-bus', 'acpi-sleep' and 'acpi-processor'
> > > git bisect bad a74d1cafc22e100a9b59c50943ca09c37e03dce8
> > > # bad: [ce87e09dd88c61f9088768a7708828423549725c] ACPICA: Parser:
> > > Allow method invocations as target operands git bisect bad
> > > ce87e09dd88c61f9088768a7708828423549725c
> > > # good: [0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076] ACPICA: Hardware:
> > > Add sleep register hooks git bisect good
> > > 0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076
> > > # good: [a654b8ca6d28736995de767ba62e801fd806a3b2] ACPICA:
> > > Disassembler: Add Switch/Case disassembly support git bisect good
> > > a654b8ca6d28736995de767ba62e801fd806a3b2
> > > # bad: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources:
> > > Not a valid resource if buffer length too long git bisect bad
> > > 57707a9a7780fab426b8ae9b4c7b65b912a748b3
> > > # good: [7225d0467c59e55566df396d6ecd5baf26ef3d9b] ACPICA:
> Utilities:
> > > Update debug output git bisect good
> > > 7225d0467c59e55566df396d6ecd5baf26ef3d9b
> > > # first bad commit: [57707a9a7780fab426b8ae9b4c7b65b912a748b3]
> ACPICA:
> > > Resources: Not a valid resource if buffer length too long ```
> > >
> > > I suggest, that just a warning is printed in this case, or that an
> > > option is added to enable some kind of “strict mode” or a quirk
> table.
> > >
> > > Please find the decompiled DSDT attached. The code to generate the
> > > ASL coreboot code is available [3].
> > >
> > > Please tell me, what information you need.
> > >
> > >
> > > Kind regards,
> > >
> > > Paul
> > >
> > >
> > > [1]
> > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/c
> > > om
> > > mit/?id=57707a9a778 [2] https://review.coreboot.org/13410/
> > > [3]
> > > https://review.coreboot.org/cgit/coreboot.git/tree/src/drivers/pc80/
> > > tp
> > > m/tpm.c
> >
> > Hi,
> >
> > Thank you for bisecting the issue. It would have been hard to achieve
> > this without the hardware. Do you want to create a patch for ACPICA?
> >
> > /Jarkko

^ permalink raw reply	[flat|nested] 20+ messages in thread

* RE: [Regression Linux 4.11] TPM module not loaded anymore
  2017-04-12 15:54                 ` Moore, Robert
@ 2017-04-12 21:26                   ` Paul Menzel
  2017-04-12 21:49                     ` Moore, Robert
  0 siblings, 1 reply; 20+ messages in thread
From: Paul Menzel @ 2017-04-12 21:26 UTC (permalink / raw)
  To: Robert Moore
  Cc: Jarkko Sakkinen, Maciej S. Szmigiero, linux-kernel,
	Arthur Heymans, tpmdd-devel, GNUtoo, Zheng, Lv, Wysocki,
	Rafael J, linux-acpi

[-- Attachment #1: Type: text/plain, Size: 384 bytes --]

Dear Robert,


Thank you for looking into this.


On 2017-04-12 17:54, Moore, Robert wrote:
> And probably the dmesg if error messages appear in there.

Linux doesn’t log any messages, as the `tpm` module doesn’t load. Please 
find the output of `sudo acpidump` attached.

[…]


Kind regards,

Paul


PS: Doesn’t your mail client support to easily reply in interleaved 
style?

[-- Attachment #2: 20170412–acpidump.txt --]
[-- Type: text/plain, Size: 65101 bytes --]

RSD  @ 0x00000000000F0800
  0000: 52 53 44 20 50 54 52 20 05 43 4F 52 45 20 20 02  RSD PTR .CORE  .
  0010: 30 50 72 7F 24 00 00 00 E0 50 72 7F 00 00 00 00  0Pr.$....Pr.....
  0020: BB 00 00 00                                      ....

RSDT @ 0x000000007F725030
  0000: 52 53 44 54 3C 00 00 00 01 23 43 4F 52 45 20 20  RSDT<....#CORE  
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  COREBOOT....CORE
  0020: 00 00 00 00 E0 80 72 7F E0 81 72 7F 10 87 72 7F  ......r...r...r.
  0030: 50 87 72 7F 90 87 72 7F 00 88 72 7F              P.r...r...r.

XSDT @ 0x000000007F7250E0
  0000: 58 53 44 54 54 00 00 00 01 05 43 4F 52 45 20 20  XSDTT.....CORE  
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  COREBOOT....CORE
  0020: 00 00 00 00 E0 80 72 7F 00 00 00 00 E0 81 72 7F  ......r.......r.
  0030: 00 00 00 00 10 87 72 7F 00 00 00 00 50 87 72 7F  ......r.....P.r.
  0040: 00 00 00 00 90 87 72 7F 00 00 00 00 00 88 72 7F  ......r.......r.
  0050: 00 00 00 00                                      ....

DSDT @ 0x000000007F725280
  0000: 44 53 44 54 58 2E 00 00 03 18 43 4F 52 45 76 34  DSDTX.....COREv4
  0010: 43 4F 52 45 42 4F 4F 54 19 04 09 20 49 4E 54 4C  COREBOOT... INTL
  0020: 26 09 14 20 10 8F 00 00 5C 00 08 4E 56 53 41 0C  &.. ....\..NVSA.
  0030: 80 E9 7F 7F 14 4F 04 5F 50 54 53 01 5C 2F 05 5F  .....O._PTS.\/._
  0040: 53 42 5F 50 43 49 30 4C 50 43 42 45 43 5F 5F 4D  SB_PCI0LPCBEC__M
  0050: 55 54 45 01 5C 2F 05 5F 53 42 5F 50 43 49 30 4C  UTE.\/._SB_PCI0L
  0060: 50 43 42 45 43 5F 5F 55 53 42 50 00 5C 2F 05 5F  PCBEC__USBP.\/._
  0070: 53 42 5F 50 43 49 30 4C 50 43 42 45 43 5F 5F 52  SB_PCI0LPCBEC__R
  0080: 41 44 49 00 14 18 5F 57 41 4B 01 A0 05 93 68 0A  ADI..._WAK....h.
  0090: 03 A0 05 93 68 0A 04 A4 12 04 02 00 00 10 1F 5F  ....h.........._
  00A0: 53 42 5F 14 19 5F 49 4E 49 00 47 4F 53 5F A0 0E  SB_.._INI.GOS_..
  00B0: 90 93 4F 53 59 53 0B D1 07 4D 50 45 4E 08 50 49  ..OSYS...MPEN.PI
  00C0: 43 4D 00 08 44 53 45 4E 01 5B 80 47 4E 56 53 00  CM..DSEN.[.GNVS.
  00D0: 4E 56 53 41 0B 00 01 5B 81 4E 22 47 4E 56 53 01  NVSA...[.N"GNVS.
  00E0: 4F 53 59 53 10 53 4D 49 46 08 50 52 4D 30 08 50  OSYS.SMIF.PRM0.P
  00F0: 52 4D 31 08 53 43 49 46 08 50 52 4D 32 08 50 52  RM1.SCIF.PRM2.PR
  0100: 4D 33 08 4C 43 4B 46 08 50 52 4D 34 08 50 52 4D  M3.LCKF.PRM4.PRM
  0110: 35 08 50 38 30 44 20 4C 49 44 53 08 50 57 52 53  5.P80D LIDS.PWRS
  0120: 08 44 42 47 53 08 4C 49 4E 58 08 44 43 4B 4E 08  .DBGS.LINX.DCKN.
  0130: 41 43 54 54 08 50 53 56 54 08 54 43 31 56 08 54  ACTT.PSVT.TC1V.T
  0140: 43 32 56 08 54 53 50 56 08 43 52 54 54 08 44 54  C2V.TSPV.CRTT.DT
  0150: 53 45 08 44 54 53 31 08 44 54 53 32 08 00 08 42  SE.DTS1.DTS2...B
  0160: 4E 55 4D 08 42 30 53 43 08 42 31 53 43 08 42 32  NUM.B0SC.B1SC.B2
  0170: 53 43 08 42 30 53 53 08 42 31 53 53 08 42 32 53  SC.B0SS.B1SS.B2S
  0180: 53 08 00 18 41 50 49 43 08 4D 50 45 4E 08 50 43  S...APIC.MPEN.PC
  0190: 50 30 08 50 43 50 31 08 50 50 43 4D 08 00 28 4E  P0.PCP1.PPCM..(N
  01A0: 41 54 50 08 43 4D 41 50 08 43 4D 42 50 08 4C 50  ATP.CMAP.CMBP.LP
  01B0: 54 50 08 46 44 43 50 08 52 46 44 56 08 48 4F 54  TP.FDCP.RFDV.HOT
  01C0: 4B 08 52 54 43 46 08 55 54 49 4C 08 41 43 49 4E  K.RTCF.UTIL.ACIN
  01D0: 08 49 47 44 53 08 54 4C 53 54 08 43 41 44 4C 08  .IGDS.TLST.CADL.
  01E0: 50 41 44 4C 08 43 53 54 45 10 4E 53 54 45 10 53  PADL.CSTE.NSTE.S
  01F0: 53 54 45 10 4E 44 49 44 08 44 49 44 31 20 44 49  STE.NDID.DID1 DI
  0200: 44 32 20 44 49 44 33 20 44 49 44 34 20 44 49 44  D2 DID3 DID4 DID
  0210: 35 20 00 48 04 42 4C 43 53 08 42 52 54 4C 08 4F  5 .H.BLCS.BRTL.O
  0220: 44 44 53 08 00 38 41 4C 53 45 08 41 4C 41 46 08  DDS..8ALSE.ALAF.
  0230: 4C 4C 4F 57 08 4C 48 49 48 08 00 30 45 4D 41 45  LLOW.LHIH..0EMAE
  0240: 08 45 4D 41 50 10 45 4D 41 4C 10 00 28 4D 45 46  .EMAP.EMAL..(MEF
  0250: 45 08 00 48 04 54 50 4D 50 08 54 50 4D 45 08 00  E..H.TPMP.TPME..
  0260: 40 04 47 54 46 30 38 47 54 46 31 38 47 54 46 32  @.GTF08GTF18GTF2
  0270: 38 49 44 45 4D 08 49 44 45 54 08 00 38 41 53 4C  8IDEM.IDET..8ASL
  0280: 42 20 49 42 54 54 08 49 50 41 54 08 49 54 56 46  B IBTT.IPAT.ITVF
  0290: 08 49 54 56 4D 08 49 50 53 43 08 49 42 4C 43 08  .ITVM.IPSC.IBLC.
  02A0: 49 42 49 41 08 49 53 53 43 08 49 34 30 39 08 49  IBIA.ISSC.I409.I
  02B0: 35 30 39 08 49 36 30 39 08 49 37 30 39 08 49 44  509.I609.I709.ID
  02C0: 4D 4D 08 49 44 4D 53 08 49 46 31 45 08 48 56 43  MM.IDMS.IF1E.HVC
  02D0: 4F 08 4E 58 44 31 20 4E 58 44 32 20 4E 58 44 33  O.NXD1 NXD2 NXD3
  02E0: 20 4E 58 44 34 20 4E 58 44 35 20 4E 58 44 36 20   NXD4 NXD5 NXD6 
  02F0: 4E 58 44 37 20 4E 58 44 38 20 00 40 04 44 4F 43  NXD7 NXD8 .@.DOC
  0300: 4B 08 42 54 45 4E 08 5B 80 41 50 4D 50 01 0A B2  K.BTEN.[.APMP...
  0310: 0A 02 5B 81 10 41 50 4D 50 01 41 50 4D 43 08 41  ..[..APMP.APMC.A
  0320: 50 4D 53 08 5B 80 50 4F 53 54 01 0A 80 01 5B 81  PMS.[.POST....[.
  0330: 0B 50 4F 53 54 11 44 42 47 30 08 14 17 54 52 41  .POST.DBG0...TRA
  0340: 50 09 70 68 53 4D 49 46 70 00 54 52 50 30 A4 53  P.phSMIFp.TRP0.S
  0350: 4D 49 46 14 0C 5F 50 49 43 01 70 68 50 49 43 4D  MIF.._PIC.phPICM
  0360: 14 44 0A 47 4F 53 5F 00 70 0B D0 07 4F 53 59 53  .D.GOS_.p...OSYS
  0370: A0 44 09 5B 12 5F 4F 53 49 00 A0 12 5F 4F 53 49  .D.[._OSI..._OSI
  0380: 0D 4C 69 6E 75 78 00 70 01 4C 49 4E 58 A0 1B 5F  .Linux.p.LINX.._
  0390: 4F 53 49 0D 57 69 6E 64 6F 77 73 20 32 30 30 31  OSI.Windows 2001
  03A0: 00 70 0B D1 07 4F 53 59 53 A0 1F 5F 4F 53 49 0D  .p...OSYS.._OSI.
  03B0: 57 69 6E 64 6F 77 73 20 32 30 30 31 20 53 50 31  Windows 2001 SP1
  03C0: 00 70 0B D1 07 4F 53 59 53 A0 1F 5F 4F 53 49 0D  .p...OSYS.._OSI.
  03D0: 57 69 6E 64 6F 77 73 20 32 30 30 31 20 53 50 32  Windows 2001 SP2
  03E0: 00 70 0B D2 07 4F 53 59 53 A0 1B 5F 4F 53 49 0D  .p...OSYS.._OSI.
  03F0: 57 69 6E 64 6F 77 73 20 32 30 30 36 00 70 0B D6  Windows 2006.p..
  0400: 07 4F 53 59 53 10 27 5F 47 50 45 14 21 5F 4C 31  .OSYS.'_GPE.!_L1
  0410: 38 00 70 5C 2F 05 5F 53 42 5F 50 43 49 30 4C 50  8.p\/._SB_PCI0LP
  0420: 43 42 45 43 5F 5F 57 41 4B 45 60 75 60 14 42 09  CBEC__WAKE`u`.B.
  0430: 50 4E 4F 54 00 A0 4A 06 4D 50 45 4E A0 31 7B 50  PNOT..J.MPEN.1{P
  0440: 44 43 30 0A 08 00 86 5C 2E 5F 50 52 5F 43 50 30  DC0....\._PR_CP0
  0450: 30 0A 80 A0 1A 7B 50 44 43 30 0A 10 00 5B 22 0A  0....{PDC0...[".
  0460: 64 86 5C 2E 5F 50 52 5F 43 50 30 30 0A 81 A0 31  d.\._PR_CP00...1
  0470: 7B 50 44 43 31 0A 08 00 86 5C 2E 5F 50 52 5F 43  {PDC1....\._PR_C
  0480: 50 30 31 0A 80 A0 1A 7B 50 44 43 31 0A 10 00 5B  P01....{PDC1...[
  0490: 22 0A 64 86 5C 2E 5F 50 52 5F 43 50 30 31 0A 81  ".d.\._PR_CP01..
  04A0: A1 1F 86 5C 2E 5F 50 52 5F 43 50 30 30 0A 80 5B  ...\._PR_CP00..[
  04B0: 22 0A 64 86 5C 2E 5F 50 52 5F 43 50 30 30 0A 81  ".d.\._PR_CP00..
  04C0: 10 8E 8A 02 5F 53 42 5F 5B 82 85 8A 02 50 43 49  ...._SB_[....PCI
  04D0: 30 08 5F 48 49 44 0C 41 D0 0A 08 08 5F 43 49 44  0._HID.A...._CID
  04E0: 0C 41 D0 0A 03 08 5F 41 44 52 00 08 5F 42 42 4E  .A...._ADR.._BBN
  04F0: 00 5B 82 48 0C 4D 43 48 43 08 5F 41 44 52 00 5B  .[.H.MCHC._ADR.[
  0500: 80 4D 43 48 50 02 00 0B 00 01 5B 81 4F 0A 4D 43  .MCHP.....[.O.MC
  0510: 48 50 03 00 40 20 45 50 45 4E 01 00 0B 45 50 42  HP..@ EPEN...EPB
  0520: 52 14 4D 48 45 4E 01 00 0D 4D 48 42 52 12 50 58  R.MHEN...MHBR.PX
  0530: 45 4E 01 50 58 53 5A 02 00 17 50 58 42 52 06 44  EN.PXSZ...PXBR.D
  0540: 4D 45 4E 01 00 0B 44 4D 42 52 14 00 40 20 00 04  MEN...DMBR..@ ..
  0550: 50 4D 30 48 02 00 02 50 4D 31 4C 02 00 02 50 4D  PM0H...PM1L...PM
  0560: 31 48 02 00 02 50 4D 32 4C 02 00 02 50 4D 32 48  1H...PM2L...PM2H
  0570: 02 00 02 50 4D 33 4C 02 00 02 50 4D 33 48 02 00  ...PM3L...PM3H..
  0580: 02 50 4D 34 4C 02 00 02 50 4D 34 48 02 00 02 50  .PM4L...PM4H...P
  0590: 4D 35 4C 02 00 02 50 4D 35 48 02 00 02 50 4D 36  M5L...PM5H...PM6
  05A0: 4C 02 00 02 50 4D 36 48 02 00 02 00 28 00 03 54  L...PM6H....(..T
  05B0: 4C 55 44 05 00 18 54 4F 4D 5F 10 08 4D 43 52 53  LUD...TOM_..MCRS
  05C0: 11 43 1F 0B EE 01 88 0D 00 02 0C 00 00 00 00 00  .C..............
  05D0: FF 00 00 00 00 01 87 17 00 01 0C 03 00 00 00 00  ................
  05E0: 00 00 00 00 F7 0C 00 00 00 00 00 00 F8 0C 00 00  ................
  05F0: 47 01 F8 0C F8 0C 01 08 87 17 00 01 0C 03 00 00  G...............
  0600: 00 00 00 0D 00 00 FF FF 00 00 00 00 00 00 00 F3  ................
  0610: 00 00 87 17 00 00 0C 03 00 00 00 00 00 00 0A 00  ................
  0620: FF FF 0B 00 00 00 00 00 00 00 02 00 87 17 00 00  ................
  0630: 0C 03 00 00 00 00 00 00 0C 00 FF 3F 0C 00 00 00  ...........?....
  0640: 00 00 00 40 00 00 87 17 00 00 0C 03 00 00 00 00  ...@............
  0650: 00 40 0C 00 FF 7F 0C 00 00 00 00 00 00 40 00 00  .@...........@..
  0660: 87 17 00 00 0C 03 00 00 00 00 00 80 0C 00 FF BF  ................
  0670: 0C 00 00 00 00 00 00 40 00 00 87 17 00 00 0C 03  .......@........
  0680: 00 00 00 00 00 C0 0C 00 FF FF 0C 00 00 00 00 00  ................
  0690: 00 40 00 00 87 17 00 00 0C 03 00 00 00 00 00 00  .@..............
  06A0: 0D 00 FF 3F 0D 00 00 00 00 00 00 40 00 00 87 17  ...?.......@....
  06B0: 00 00 0C 03 00 00 00 00 00 40 0D 00 FF 7F 0D 00  .........@......
  06C0: 00 00 00 00 00 40 00 00 87 17 00 00 0C 03 00 00  .....@..........
  06D0: 00 00 00 80 0D 00 FF BF 0D 00 00 00 00 00 00 40  ...............@
  06E0: 00 00 87 17 00 00 0C 03 00 00 00 00 00 C0 0D 00  ................
  06F0: FF FF 0D 00 00 00 00 00 00 40 00 00 87 17 00 00  .........@......
  0700: 0C 03 00 00 00 00 00 00 0E 00 FF 3F 0E 00 00 00  ...........?....
  0710: 00 00 00 40 00 00 87 17 00 00 0C 03 00 00 00 00  ...@............
  0720: 00 40 0E 00 FF 7F 0E 00 00 00 00 00 00 40 00 00  .@...........@..
  0730: 87 17 00 00 0C 03 00 00 00 00 00 80 0E 00 FF BF  ................
  0740: 0E 00 00 00 00 00 00 40 00 00 87 17 00 00 0C 03  .......@........
  0750: 00 00 00 00 00 C0 0E 00 FF FF 0E 00 00 00 00 00  ................
  0760: 00 40 00 00 87 17 00 00 0C 03 00 00 00 00 00 00  .@..............
  0770: 0F 00 FF FF 0F 00 00 00 00 00 00 00 01 00 87 17  ................
  0780: 00 00 0C 03 00 00 00 00 00 00 00 00 FF FF BF FE  ................
  0790: 00 00 00 00 00 00 C0 FE 87 17 00 00 0C 03 00 00  ................
  07A0: 00 00 00 00 D4 FE FF 4F D4 FE 00 00 00 00 00 50  .......O.......P
  07B0: 00 00 79 00 14 41 05 5F 43 52 53 08 8A 4D 43 52  ..y..A._CRS..MCR
  07C0: 53 0B C2 01 50 4D 49 4E 8A 4D 43 52 53 0B C6 01  S...PMIN.MCRS...
  07D0: 50 4D 41 58 8A 4D 43 52 53 0B CE 01 50 4C 45 4E  PMAX.MCRS...PLEN
  07E0: 79 5E 2E 4D 43 48 43 54 4C 55 44 0A 1B 50 4D 49  y^.MCHCTLUD..PMI
  07F0: 4E 72 74 50 4D 41 58 50 4D 49 4E 00 01 50 4C 45  NrtPMAXPMIN..PLE
  0800: 4E A4 4D 43 52 53 14 45 1C 5F 50 52 54 00 A0 4C  N.MCRS.E._PRT..L
  0810: 0A 50 49 43 4D A4 12 44 0A 0D 12 0B 04 0C FF FF  .PICM..D........
  0820: 02 00 00 00 0A 10 12 0B 04 0C FF FF 1B 00 01 00  ................
  0830: 0A 11 12 0B 04 0C FF FF 1C 00 00 00 0A 14 12 0B  ................
  0840: 04 0C FF FF 1C 00 01 00 0A 15 12 0C 04 0C FF FF  ................
  0850: 1C 00 0A 02 00 0A 16 12 0C 04 0C FF FF 1C 00 0A  ................
  0860: 03 00 0A 17 12 0B 04 0C FF FF 1D 00 00 00 0A 10  ................
  0870: 12 0B 04 0C FF FF 1D 00 01 00 0A 11 12 0C 04 0C  ................
  0880: FF FF 1D 00 0A 02 00 0A 12 12 0C 04 0C FF FF 1D  ................
  0890: 00 0A 03 00 0A 13 12 0B 04 0C FF FF 1F 00 00 00  ................
  08A0: 0A 17 12 0B 04 0C FF FF 1F 00 01 00 0A 10 12 0C  ................
  08B0: 04 0C FF FF 1F 00 0A 02 00 0A 10 A1 40 11 A4 12  ............@...
  08C0: 4C 10 0D 12 13 04 0C FF FF 02 00 00 5E 2E 4C 50  L...........^.LP
  08D0: 43 42 4C 4E 4B 41 00 12 13 04 0C FF FF 1B 00 01  CBLNKA..........
  08E0: 5E 2E 4C 50 43 42 4C 4E 4B 42 00 12 13 04 0C FF  ^.LPCBLNKB......
  08F0: FF 1C 00 00 5E 2E 4C 50 43 42 4C 4E 4B 45 00 12  ....^.LPCBLNKE..
  0900: 13 04 0C FF FF 1C 00 01 5E 2E 4C 50 43 42 4C 4E  ........^.LPCBLN
  0910: 4B 46 00 12 14 04 0C FF FF 1C 00 0A 02 5E 2E 4C  KF...........^.L
  0920: 50 43 42 4C 4E 4B 47 00 12 14 04 0C FF FF 1C 00  PCBLNKG.........
  0930: 0A 03 5E 2E 4C 50 43 42 4C 4E 4B 48 00 12 13 04  ..^.LPCBLNKH....
  0940: 0C FF FF 1D 00 00 5E 2E 4C 50 43 42 4C 4E 4B 41  ......^.LPCBLNKA
  0950: 00 12 13 04 0C FF FF 1D 00 01 5E 2E 4C 50 43 42  ..........^.LPCB
  0960: 4C 4E 4B 42 00 12 14 04 0C FF FF 1D 00 0A 02 5E  LNKB...........^
  0970: 2E 4C 50 43 42 4C 4E 4B 43 00 12 14 04 0C FF FF  .LPCBLNKC.......
  0980: 1D 00 0A 03 5E 2E 4C 50 43 42 4C 4E 4B 44 00 12  ....^.LPCBLNKD..
  0990: 13 04 0C FF FF 1F 00 00 5E 2E 4C 50 43 42 4C 4E  ........^.LPCBLN
  09A0: 4B 48 00 12 13 04 0C FF FF 1F 00 01 5E 2E 4C 50  KH..........^.LP
  09B0: 43 42 4C 4E 4B 41 00 12 14 04 0C FF FF 1F 00 0A  CBLNKA..........
  09C0: 02 5E 2E 4C 50 43 42 4C 4E 4B 41 00 14 47 04 5F  .^.LPCBLNKA..G._
  09D0: 4F 53 43 04 8A 6B 00 43 44 57 31 8A 6B 0A 04 43  OSC..k.CDW1.k..C
  09E0: 44 57 32 8A 6B 0A 08 43 44 57 33 A0 19 93 68 11  DW2.k..CDW3...h.
  09F0: 13 0A 10 5B 4D DB 33 F7 1F 1C 40 96 57 74 41 C0  ...[M.3...@.WtA.
  0A00: 3D D7 66 A4 6B A1 0E 7D 43 44 57 31 0A 04 43 44  =.f.k..}CDW1..CD
  0A10: 57 31 A4 6B 5B 82 4E 08 50 44 52 43 08 5F 48 49  W1.k[.N.PDRC._HI
  0A20: 44 0C 41 D0 0C 02 08 5F 55 49 44 01 08 50 44 52  D.A...._UID..PDR
  0A30: 53 11 46 06 0A 62 86 09 00 01 00 C0 D1 FE 00 40  S.F..b.........@
  0A40: 00 00 86 09 00 01 00 40 D1 FE 00 40 00 00 86 09  .......@...@....
  0A50: 00 01 00 80 D1 FE 00 10 00 00 86 09 00 01 00 90  ................
  0A60: D1 FE 00 10 00 00 86 09 00 01 00 00 00 F0 00 00  ................
  0A70: 00 04 86 09 00 01 00 00 D2 FE 00 00 02 00 86 09  ................
  0A80: 00 01 00 00 D4 FE 00 50 00 00 86 09 00 01 00 50  .......P.......P
  0A90: D4 FE 00 B0 04 00 79 00 14 0B 5F 43 52 53 08 A4  ......y..._CRS..
  0AA0: 50 44 52 53 5B 82 42 0A 50 45 47 50 08 5F 41 44  PDRS[.B.PEGP._AD
  0AB0: 52 0C 00 00 01 00 14 41 09 5F 50 52 54 00 A0 33  R......A._PRT..3
  0AC0: 50 49 43 4D A4 12 2C 04 12 09 04 0B FF FF 00 00  PICM..,.........
  0AD0: 0A 10 12 09 04 0B FF FF 01 00 0A 11 12 0A 04 0B  ................
  0AE0: FF FF 0A 02 00 0A 12 12 0A 04 0B FF FF 0A 03 00  ................
  0AF0: 0A 13 A1 45 05 A4 12 41 05 04 12 12 04 0B FF FF  ...E...A........
  0B00: 00 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 12 12 04  .^^.LPCBLNKA....
  0B10: 0B FF FF 01 5E 5E 2E 4C 50 43 42 4C 4E 4B 42 00  ....^^.LPCBLNKB.
  0B20: 12 13 04 0B FF FF 0A 02 5E 5E 2E 4C 50 43 42 4C  ........^^.LPCBL
  0B30: 4E 4B 43 00 12 13 04 0B FF FF 0A 03 5E 5E 2E 4C  NKC.........^^.L
  0B40: 50 43 42 4C 4E 4B 44 00 5B 82 49 18 47 46 58 30  PCBLNKD.[.I.GFX0
  0B50: 08 5F 41 44 52 0C 00 00 02 00 08 42 52 49 47 12  ._ADR......BRIG.
  0B60: 24 12 0A 0F 0A 0F 00 01 0A 02 0A 03 0A 04 0A 05  $...............
  0B70: 0A 06 0A 07 0A 08 0A 09 0A 0A 0A 0B 0A 0C 0A 0D  ................
  0B80: 0A 0E 0A 0F 14 21 58 42 43 4D 01 70 7D 79 68 0A  .....!XBCM.p}yh.
  0B90: 04 00 0A 0F 00 5E 5E 2E 44 53 50 43 42 52 54 43  .....^^.DSPCBRTC
  0BA0: 54 52 41 50 0A 03 14 1A 58 42 51 43 00 70 5E 5E  TRAP....XBQC.p^^
  0BB0: 2E 44 53 50 43 42 52 54 43 60 7A 60 0A 04 60 A4  .DSPCBRTC`z`..`.
  0BC0: 60 08 42 52 43 54 00 14 23 42 52 49 44 01 70 89  `.BRCT..#BRID.p.
  0BD0: 42 52 49 47 01 68 00 00 0A 02 60 A0 0D 93 60 FF  BRIG.h....`...`.
  0BE0: A4 74 87 42 52 49 47 01 00 A4 60 14 11 58 42 43  .t.BRIG...`..XBC
  0BF0: 4C 00 70 01 42 52 43 54 A4 42 52 49 47 14 10 5F  L.p.BRCT.BRIG.._
  0C00: 44 4F 53 01 70 7B 68 0A 07 00 44 53 45 4E 14 34  DOS.p{h...DSEN.4
  0C10: 44 45 43 42 00 A0 0C 42 52 43 54 86 4C 43 44 30  DECB...BRCT.LCD0
  0C20: 0A 87 A1 20 70 42 52 49 44 58 42 51 43 60 A0 08  ... pBRIDXBQC`..
  0C30: 92 93 60 0A 02 76 60 58 42 43 4D 83 88 42 52 49  ..`..v`XBCM..BRI
  0C40: 47 60 00 14 3A 49 4E 43 42 00 A0 0C 42 52 43 54  G`..:INCB...BRCT
  0C50: 86 4C 43 44 30 0A 86 A1 26 70 42 52 49 44 58 42  .LCD0...&pBRIDXB
  0C60: 51 43 60 A0 0E 92 93 60 74 87 42 52 49 47 01 00  QC`....`t.BRIG..
  0C70: 75 60 58 42 43 4D 83 88 42 52 49 47 60 00 14 1D  u`XBCM..BRIG`...
  0C80: 58 44 43 53 01 54 52 41 50 01 A0 0E 7B 43 53 54  XDCS.TRAP...{CST
  0C90: 45 79 01 68 00 00 A4 0A 1F A4 0A 1D 14 16 58 44  Ey.h..........XD
  0CA0: 47 53 01 A0 0D 7B 4E 53 54 45 79 01 68 00 00 A4  GS...{NSTEy.h...
  0CB0: 01 A4 00 14 1F 58 44 53 53 02 A0 18 93 7B 68 0C  .....XDSS....{h.
  0CC0: 00 00 00 C0 00 0C 00 00 00 C0 70 4E 53 54 45 43  ..........pNSTEC
  0CD0: 53 54 45 5B 82 2A 44 53 50 43 08 5F 41 44 52 0C  STE[.*DSPC._ADR.
  0CE0: 01 00 02 00 5B 80 44 53 50 43 02 00 0B 00 01 5B  ....[.DSPC.....[
  0CF0: 81 0E 44 53 50 43 01 00 40 7A 42 52 54 43 08 10  ..DSPC..@zBRTC..
  0D00: 49 24 5C 00 5B 80 49 4F 5F 54 01 0B 00 08 0A 10  I$\.[.IO_T......
  0D10: 5B 81 0E 49 4F 5F 54 01 00 40 04 54 52 50 30 08  [..IO_T..@.TRP0.
  0D20: 5B 80 50 4D 49 4F 01 0B 00 05 0A 80 5B 81 19 50  [.PMIO......[..P
  0D30: 4D 49 4F 01 00 40 21 00 01 47 50 45 43 01 00 09  MIO..@!..GPEC...
  0D40: 53 43 49 53 01 00 06 5B 80 47 50 49 4F 01 0B 80  SCIS...[.GPIO...
  0D50: 04 0A 3C 5B 81 4E 15 47 50 49 4F 01 47 55 30 30  ..<[.N.GPIO.GU00
  0D60: 08 47 55 30 31 08 47 55 30 32 08 47 55 30 33 08  .GU01.GU02.GU03.
  0D70: 47 49 4F 30 08 47 49 4F 31 08 47 49 4F 32 08 47  GIO0.GIO1.GIO2.G
  0D80: 49 4F 33 08 00 20 47 50 30 30 01 47 50 30 31 01  IO3.. GP00.GP01.
  0D90: 47 50 30 32 01 47 50 30 33 01 47 50 30 34 01 47  GP02.GP03.GP04.G
  0DA0: 50 30 35 01 47 50 30 36 01 47 50 30 37 01 47 50  P05.GP06.GP07.GP
  0DB0: 30 38 01 47 50 30 39 01 47 50 31 30 01 47 50 31  08.GP09.GP10.GP1
  0DC0: 31 01 47 50 31 32 01 47 50 31 33 01 47 50 31 34  1.GP12.GP13.GP14
  0DD0: 01 47 50 31 35 01 47 50 31 36 01 47 50 31 37 01  .GP15.GP16.GP17.
  0DE0: 47 50 31 38 01 47 50 31 39 01 47 50 32 30 01 47  GP18.GP19.GP20.G
  0DF0: 50 32 31 01 47 50 32 32 01 47 50 32 33 01 47 50  P21.GP22.GP23.GP
  0E00: 32 34 01 47 50 32 35 01 47 50 32 36 01 47 50 32  24.GP25.GP26.GP2
  0E10: 37 01 47 50 32 38 01 47 50 32 39 01 47 50 33 30  7.GP28.GP29.GP30
  0E20: 01 47 50 33 31 01 00 40 04 47 42 30 30 08 47 42  .GP31..@.GB00.GB
  0E30: 30 31 08 47 42 30 32 08 47 42 30 33 08 00 40 08  01.GB02.GB03..@.
  0E40: 47 49 56 30 08 47 49 56 31 08 47 49 56 32 08 47  GIV0.GIV1.GIV2.G
  0E50: 49 56 33 08 47 55 30 34 08 47 55 30 35 08 47 55  IV3.GU04.GU05.GU
  0E60: 30 36 08 47 55 30 37 08 47 49 4F 34 08 47 49 4F  06.GU07.GIO4.GIO
  0E70: 35 08 47 49 4F 36 08 47 49 4F 37 08 47 50 33 32  5.GIO6.GIO7.GP32
  0E80: 01 47 50 33 33 01 47 50 33 34 01 47 50 33 35 01  .GP33.GP34.GP35.
  0E90: 47 50 33 36 01 47 50 33 37 01 47 50 33 38 01 47  GP36.GP37.GP38.G
  0EA0: 50 33 39 01 47 4C 30 35 08 47 4C 30 36 08 47 4C  P39.GL05.GL06.GL
  0EB0: 30 37 08 5B 80 52 43 52 42 00 0C 00 C0 D1 FE 0B  07.[.RCRB.......
  0EC0: 00 40 5B 81 45 08 52 43 52 42 13 00 80 00 08 00  .@[.E.RCRB......
  0ED0: 80 00 10 00 80 02 02 48 50 41 53 02 00 05 48 50  .......HPAS...HP
  0EE0: 54 45 01 00 48 09 00 01 50 41 54 44 01 53 41 54  TE..H...PATD.SAT
  0EF0: 44 01 53 4D 42 44 01 48 44 41 44 01 41 39 37 44  D.SMBD.HDAD.A97D
  0F00: 01 4D 39 37 44 01 49 4C 4E 44 01 55 53 31 44 01  .M97D.ILND.US1D.
  0F10: 55 53 32 44 01 55 53 33 44 01 55 53 34 44 01 00  US2D.US3D.US4D..
  0F20: 02 4C 50 42 44 01 45 48 43 44 01 52 50 31 44 01  .LPBD.EHCD.RP1D.
  0F30: 52 50 32 44 01 52 50 33 44 01 52 50 34 44 01 52  RP2D.RP3D.RP4D.R
  0F40: 50 35 44 01 52 50 36 44 01 5B 82 1B 48 44 45 46  P5D.RP6D.[..HDEF
  0F50: 08 5F 41 44 52 0C 00 00 1B 00 08 5F 50 52 57 12  ._ADR......_PRW.
  0F60: 06 02 0A 05 0A 04 5B 82 42 0A 52 50 30 31 08 5F  ......[.B.RP01._
  0F70: 41 44 52 0C 00 00 1C 00 14 41 09 5F 50 52 54 00  ADR......A._PRT.
  0F80: A0 33 50 49 43 4D A4 12 2C 04 12 09 04 0B FF FF  .3PICM..,.......
  0F90: 00 00 0A 10 12 09 04 0B FF FF 01 00 0A 11 12 0A  ................
  0FA0: 04 0B FF FF 0A 02 00 0A 12 12 0A 04 0B FF FF 0A  ................
  0FB0: 03 00 0A 13 A1 45 05 A4 12 41 05 04 12 12 04 0B  .....E...A......
  0FC0: FF FF 00 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 12  ...^^.LPCBLNKA..
  0FD0: 12 04 0B FF FF 01 5E 5E 2E 4C 50 43 42 4C 4E 4B  ......^^.LPCBLNK
  0FE0: 42 00 12 13 04 0B FF FF 0A 02 5E 5E 2E 4C 50 43  B.........^^.LPC
  0FF0: 42 4C 4E 4B 43 00 12 13 04 0B FF FF 0A 03 5E 5E  BLNKC.........^^
  1000: 2E 4C 50 43 42 4C 4E 4B 44 00 5B 82 42 0A 52 50  .LPCBLNKD.[.B.RP
  1010: 30 32 08 5F 41 44 52 0C 01 00 1C 00 14 41 09 5F  02._ADR......A._
  1020: 50 52 54 00 A0 33 50 49 43 4D A4 12 2C 04 12 09  PRT..3PICM..,...
  1030: 04 0B FF FF 00 00 0A 11 12 09 04 0B FF FF 01 00  ................
  1040: 0A 12 12 0A 04 0B FF FF 0A 02 00 0A 13 12 0A 04  ................
  1050: 0B FF FF 0A 03 00 0A 10 A1 45 05 A4 12 41 05 04  .........E...A..
  1060: 12 12 04 0B FF FF 00 5E 5E 2E 4C 50 43 42 4C 4E  .......^^.LPCBLN
  1070: 4B 42 00 12 12 04 0B FF FF 01 5E 5E 2E 4C 50 43  KB........^^.LPC
  1080: 42 4C 4E 4B 43 00 12 13 04 0B FF FF 0A 02 5E 5E  BLNKC.........^^
  1090: 2E 4C 50 43 42 4C 4E 4B 44 00 12 13 04 0B FF FF  .LPCBLNKD.......
  10A0: 0A 03 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 5B 82  ..^^.LPCBLNKA.[.
  10B0: 42 0A 52 50 30 33 08 5F 41 44 52 0C 02 00 1C 00  B.RP03._ADR.....
  10C0: 14 41 09 5F 50 52 54 00 A0 33 50 49 43 4D A4 12  .A._PRT..3PICM..
  10D0: 2C 04 12 09 04 0B FF FF 00 00 0A 12 12 09 04 0B  ,...............
  10E0: FF FF 01 00 0A 13 12 0A 04 0B FF FF 0A 02 00 0A  ................
  10F0: 10 12 0A 04 0B FF FF 0A 03 00 0A 11 A1 45 05 A4  .............E..
  1100: 12 41 05 04 12 12 04 0B FF FF 00 5E 5E 2E 4C 50  .A.........^^.LP
  1110: 43 42 4C 4E 4B 43 00 12 12 04 0B FF FF 01 5E 5E  CBLNKC........^^
  1120: 2E 4C 50 43 42 4C 4E 4B 44 00 12 13 04 0B FF FF  .LPCBLNKD.......
  1130: 0A 02 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 12 13  ..^^.LPCBLNKA...
  1140: 04 0B FF FF 0A 03 5E 5E 2E 4C 50 43 42 4C 4E 4B  ......^^.LPCBLNK
  1150: 42 00 5B 82 42 0A 52 50 30 34 08 5F 41 44 52 0C  B.[.B.RP04._ADR.
  1160: 03 00 1C 00 14 41 09 5F 50 52 54 00 A0 33 50 49  .....A._PRT..3PI
  1170: 43 4D A4 12 2C 04 12 09 04 0B FF FF 00 00 0A 13  CM..,...........
  1180: 12 09 04 0B FF FF 01 00 0A 10 12 0A 04 0B FF FF  ................
  1190: 0A 02 00 0A 11 12 0A 04 0B FF FF 0A 03 00 0A 12  ................
  11A0: A1 45 05 A4 12 41 05 04 12 12 04 0B FF FF 00 5E  .E...A.........^
  11B0: 5E 2E 4C 50 43 42 4C 4E 4B 44 00 12 12 04 0B FF  ^.LPCBLNKD......
  11C0: FF 01 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 12 13  ..^^.LPCBLNKA...
  11D0: 04 0B FF FF 0A 02 5E 5E 2E 4C 50 43 42 4C 4E 4B  ......^^.LPCBLNK
  11E0: 42 00 12 13 04 0B FF FF 0A 03 5E 5E 2E 4C 50 43  B.........^^.LPC
  11F0: 42 4C 4E 4B 43 00 5B 82 42 0A 52 50 30 35 08 5F  BLNKC.[.B.RP05._
  1200: 41 44 52 0C 04 00 1C 00 14 41 09 5F 50 52 54 00  ADR......A._PRT.
  1210: A0 33 50 49 43 4D A4 12 2C 04 12 09 04 0B FF FF  .3PICM..,.......
  1220: 00 00 0A 10 12 09 04 0B FF FF 01 00 0A 11 12 0A  ................
  1230: 04 0B FF FF 0A 02 00 0A 12 12 0A 04 0B FF FF 0A  ................
  1240: 03 00 0A 13 A1 45 05 A4 12 41 05 04 12 12 04 0B  .....E...A......
  1250: FF FF 00 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 12  ...^^.LPCBLNKA..
  1260: 12 04 0B FF FF 01 5E 5E 2E 4C 50 43 42 4C 4E 4B  ......^^.LPCBLNK
  1270: 42 00 12 13 04 0B FF FF 0A 02 5E 5E 2E 4C 50 43  B.........^^.LPC
  1280: 42 4C 4E 4B 43 00 12 13 04 0B FF FF 0A 03 5E 5E  BLNKC.........^^
  1290: 2E 4C 50 43 42 4C 4E 4B 44 00 5B 82 42 0A 52 50  .LPCBLNKD.[.B.RP
  12A0: 30 36 08 5F 41 44 52 0C 05 00 1C 00 14 41 09 5F  06._ADR......A._
  12B0: 50 52 54 00 A0 33 50 49 43 4D A4 12 2C 04 12 09  PRT..3PICM..,...
  12C0: 04 0B FF FF 00 00 0A 11 12 09 04 0B FF FF 01 00  ................
  12D0: 0A 12 12 0A 04 0B FF FF 0A 02 00 0A 13 12 0A 04  ................
  12E0: 0B FF FF 0A 03 00 0A 10 A1 45 05 A4 12 41 05 04  .........E...A..
  12F0: 12 12 04 0B FF FF 00 5E 5E 2E 4C 50 43 42 4C 4E  .......^^.LPCBLN
  1300: 4B 42 00 12 12 04 0B FF FF 01 5E 5E 2E 4C 50 43  KB........^^.LPC
  1310: 42 4C 4E 4B 43 00 12 13 04 0B FF FF 0A 02 5E 5E  BLNKC.........^^
  1320: 2E 4C 50 43 42 4C 4E 4B 44 00 12 13 04 0B FF FF  .LPCBLNKD.......
  1330: 0A 03 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 5B 82  ..^^.LPCBLNKA.[.
  1340: 44 06 55 53 42 31 08 5F 41 44 52 0C 00 00 1D 00  D.USB1._ADR.....
  1350: 5B 80 55 30 31 50 02 00 0B 00 01 5B 81 0E 55 30  [.U01P.....[..U0
  1360: 31 50 03 00 40 62 55 31 57 45 02 08 5F 50 52 57  1P..@bU1WE.._PRW
  1370: 12 06 02 0A 03 0A 04 14 18 5F 50 53 57 01 A0 09  ........._PSW...
  1380: 68 70 0A 03 55 31 57 45 A1 07 70 00 55 31 57 45  hp..U1WE..p.U1WE
  1390: 14 09 5F 53 33 44 00 A4 0A 02 14 09 5F 53 34 44  .._S3D......_S4D
  13A0: 00 A4 0A 02 5B 82 44 06 55 53 42 32 08 5F 41 44  ....[.D.USB2._AD
  13B0: 52 0C 01 00 1D 00 5B 80 55 30 32 50 02 00 0B 00  R.....[.U02P....
  13C0: 01 5B 81 0E 55 30 32 50 03 00 40 62 55 32 57 45  .[..U02P..@bU2WE
  13D0: 02 08 5F 50 52 57 12 06 02 0A 03 0A 04 14 18 5F  .._PRW........._
  13E0: 50 53 57 01 A0 09 68 70 0A 03 55 32 57 45 A1 07  PSW...hp..U2WE..
  13F0: 70 00 55 32 57 45 14 09 5F 53 33 44 00 A4 0A 02  p.U2WE.._S3D....
  1400: 14 09 5F 53 34 44 00 A4 0A 02 5B 82 44 06 55 53  .._S4D....[.D.US
  1410: 42 33 08 5F 41 44 52 0C 02 00 1D 00 5B 80 55 30  B3._ADR.....[.U0
  1420: 33 50 02 00 0B 00 01 5B 81 0E 55 30 33 50 03 00  3P.....[..U03P..
  1430: 40 62 55 33 57 45 02 08 5F 50 52 57 12 06 02 0A  @bU3WE.._PRW....
  1440: 03 0A 04 14 18 5F 50 53 57 01 A0 09 68 70 0A 03  ....._PSW...hp..
  1450: 55 33 57 45 A1 07 70 00 55 33 57 45 14 09 5F 53  U3WE..p.U3WE.._S
  1460: 33 44 00 A4 0A 02 14 09 5F 53 34 44 00 A4 0A 02  3D......_S4D....
  1470: 5B 82 44 06 55 53 42 34 08 5F 41 44 52 0C 03 00  [.D.USB4._ADR...
  1480: 1D 00 5B 80 55 30 34 50 02 00 0B 00 01 5B 81 0E  ..[.U04P.....[..
  1490: 55 30 34 50 03 00 40 62 55 34 57 45 02 08 5F 50  U04P..@bU4WE.._P
  14A0: 52 57 12 06 02 0A 03 0A 04 14 18 5F 50 53 57 01  RW........._PSW.
  14B0: A0 09 68 70 0A 03 55 34 57 45 A1 07 70 00 55 34  ..hp..U4WE..p.U4
  14C0: 57 45 14 09 5F 53 33 44 00 A4 0A 02 14 09 5F 53  WE.._S3D......_S
  14D0: 34 44 00 A4 0A 02 5B 82 41 09 45 48 43 31 08 5F  4D....[.A.EHC1._
  14E0: 41 44 52 0C 07 00 1D 00 08 5F 50 52 57 12 06 02  ADR......_PRW...
  14F0: 0A 0D 0A 04 14 09 5F 53 33 44 00 A4 0A 02 14 09  ......_S3D......
  1500: 5F 53 34 44 00 A4 0A 02 5B 82 4F 05 48 55 42 37  _S4D....[.O.HUB7
  1510: 08 5F 41 44 52 00 5B 82 0B 50 52 54 31 08 5F 41  ._ADR.[..PRT1._A
  1520: 44 52 01 5B 82 0C 50 52 54 32 08 5F 41 44 52 0A  DR.[..PRT2._ADR.
  1530: 02 5B 82 0C 50 52 54 33 08 5F 41 44 52 0A 03 5B  .[..PRT3._ADR..[
  1540: 82 0C 50 52 54 34 08 5F 41 44 52 0A 04 5B 82 0C  ..PRT4._ADR..[..
  1550: 50 52 54 35 08 5F 41 44 52 0A 05 5B 82 0C 50 52  PRT5._ADR..[..PR
  1560: 54 36 08 5F 41 44 52 0A 06 5B 82 4F 1A 50 43 49  T6._ADR..[.O.PCI
  1570: 42 08 5F 41 44 52 0C 00 00 1E 00 5B 82 17 53 4C  B._ADR.....[..SL
  1580: 54 31 08 5F 41 44 52 00 08 5F 50 52 57 12 06 02  T1._ADR.._PRW...
  1590: 0A 0B 0A 04 5B 82 1B 53 4C 54 32 08 5F 41 44 52  ....[..SLT2._ADR
  15A0: 0C 00 00 01 00 08 5F 50 52 57 12 06 02 0A 0B 0A  ......_PRW......
  15B0: 04 5B 82 1B 53 4C 54 33 08 5F 41 44 52 0C 00 00  .[..SLT3._ADR...
  15C0: 02 00 08 5F 50 52 57 12 06 02 0A 0B 0A 04 5B 82  ..._PRW.......[.
  15D0: 1B 53 4C 54 36 08 5F 41 44 52 0C 00 00 05 00 08  .SLT6._ADR......
  15E0: 5F 50 52 57 12 06 02 0A 0B 0A 04 5B 82 1B 4C 41  _PRW.......[..LA
  15F0: 4E 43 08 5F 41 44 52 0C 00 00 08 00 08 5F 50 52  NC._ADR......_PR
  1600: 57 12 06 02 0A 0B 0A 03 5B 82 17 4C 41 4E 52 08  W.......[..LANR.
  1610: 5F 41 44 52 00 08 5F 50 52 57 12 06 02 0A 0B 0A  _ADR.._PRW......
  1620: 03 14 48 0F 5F 50 52 54 00 A0 4A 05 50 49 43 4D  ..H._PRT..J.PICM
  1630: A4 12 42 05 07 12 09 04 0B FF FF 00 00 0A 10 12  ..B.............
  1640: 09 04 0B FF FF 01 00 0A 11 12 0A 04 0B FF FF 0A  ................
  1650: 02 00 0A 12 12 0B 04 0C FF FF 01 00 00 00 0A 10  ................
  1660: 12 0B 04 0C FF FF 02 00 00 00 0A 15 12 0B 04 0C  ................
  1670: FF FF 02 00 01 00 0A 16 12 0B 04 0C FF FF 08 00  ................
  1680: 00 00 0A 14 A1 45 09 A4 12 41 09 07 12 12 04 0B  .....E...A......
  1690: FF FF 00 5E 5E 2E 4C 50 43 42 4C 4E 4B 41 00 12  ...^^.LPCBLNKA..
  16A0: 12 04 0B FF FF 01 5E 5E 2E 4C 50 43 42 4C 4E 4B  ......^^.LPCBLNK
  16B0: 42 00 12 13 04 0B FF FF 0A 02 5E 5E 2E 4C 50 43  B.........^^.LPC
  16C0: 42 4C 4E 4B 43 00 12 14 04 0C FF FF 01 00 00 5E  BLNKC..........^
  16D0: 5E 2E 4C 50 43 42 4C 4E 4B 41 00 12 14 04 0C FF  ^.LPCBLNKA......
  16E0: FF 02 00 00 5E 5E 2E 4C 50 43 42 4C 4E 4B 46 00  ....^^.LPCBLNKF.
  16F0: 12 14 04 0C FF FF 02 00 01 5E 5E 2E 4C 50 43 42  .........^^.LPCB
  1700: 4C 4E 4B 47 00 12 14 04 0C FF FF 08 00 00 5E 5E  LNKG..........^^
  1710: 2E 4C 50 43 42 4C 4E 4B 45 00 5B 82 0F 41 55 44  .LPCBLNKE.[..AUD
  1720: 30 08 5F 41 44 52 0C 02 00 1E 00 5B 82 1B 4D 4F  0._ADR.....[..MO
  1730: 44 4D 08 5F 41 44 52 0C 03 00 1E 00 08 5F 50 52  DM._ADR......_PR
  1740: 57 12 06 02 0A 05 0A 04 5B 82 84 48 01 4C 50 43  W.......[..H.LPC
  1750: 42 08 5F 41 44 52 0C 00 00 1F 00 5B 80 4C 50 43  B._ADR.....[.LPC
  1760: 30 02 00 0B 00 01 5B 81 48 05 4C 50 43 30 00 00  0.....[.H.LPC0..
  1770: 40 20 50 4D 42 53 10 00 40 0F 50 52 54 41 08 50  @ PMBS..@.PRTA.P
  1780: 52 54 42 08 50 52 54 43 08 50 52 54 44 08 00 20  RTB.PRTC.PRTD.. 
  1790: 50 52 54 45 08 50 52 54 46 08 50 52 54 47 08 50  PRTE.PRTF.PRTG.P
  17A0: 52 54 48 08 00 40 0A 49 4F 44 30 08 49 4F 44 31  RTH..@.IOD0.IOD1
  17B0: 08 00 40 37 52 43 45 4E 01 00 0D 52 43 42 41 12  ..@7RCEN...RCBA.
  17C0: 5B 82 41 0A 4C 4E 4B 41 08 5F 48 49 44 0C 41 D0  [.A.LNKA._HID.A.
  17D0: 0C 0F 08 5F 55 49 44 01 14 0D 5F 44 49 53 08 70  ..._UID..._DIS.p
  17E0: 0A 80 50 52 54 41 08 5F 50 52 53 11 09 0A 06 23  ..PRTA._PRS....#
  17F0: F8 D4 18 79 00 14 38 5F 43 52 53 08 08 52 54 4C  ...y..8_CRS..RTL
  1800: 41 11 09 0A 06 23 00 00 18 79 00 8B 52 54 4C 41  A....#...y..RTLA
  1810: 01 49 52 51 30 70 00 49 52 51 30 79 01 7B 50 52  .IRQ0p.IRQ0y.{PR
  1820: 54 41 0A 0F 00 49 52 51 30 A4 52 54 4C 41 14 1B  TA...IRQ0.RTLA..
  1830: 5F 53 52 53 09 8B 68 01 49 52 51 30 82 49 52 51  _SRS..h.IRQ0.IRQ
  1840: 30 60 76 60 70 60 50 52 54 41 14 18 5F 53 54 41  0`v`p`PRTA.._STA
  1850: 08 A0 0C 7B 50 52 54 41 0A 80 00 A4 0A 09 A1 04  ...{PRTA........
  1860: A4 0A 0B 5B 82 42 0A 4C 4E 4B 42 08 5F 48 49 44  ...[.B.LNKB._HID
  1870: 0C 41 D0 0C 0F 08 5F 55 49 44 0A 02 14 0D 5F 44  .A...._UID...._D
  1880: 49 53 08 70 0A 80 50 52 54 42 08 5F 50 52 53 11  IS.p..PRTB._PRS.
  1890: 09 0A 06 23 F8 D8 18 79 00 14 38 5F 43 52 53 08  ...#...y..8_CRS.
  18A0: 08 52 54 4C 42 11 09 0A 06 23 00 00 18 79 00 8B  .RTLB....#...y..
  18B0: 52 54 4C 42 01 49 52 51 30 70 00 49 52 51 30 79  RTLB.IRQ0p.IRQ0y
  18C0: 01 7B 50 52 54 42 0A 0F 00 49 52 51 30 A4 52 54  .{PRTB...IRQ0.RT
  18D0: 4C 42 14 1B 5F 53 52 53 09 8B 68 01 49 52 51 30  LB.._SRS..h.IRQ0
  18E0: 82 49 52 51 30 60 76 60 70 60 50 52 54 42 14 18  .IRQ0`v`p`PRTB..
  18F0: 5F 53 54 41 08 A0 0C 7B 50 52 54 42 0A 80 00 A4  _STA...{PRTB....
  1900: 0A 09 A1 04 A4 0A 0B 5B 82 42 0A 4C 4E 4B 43 08  .......[.B.LNKC.
  1910: 5F 48 49 44 0C 41 D0 0C 0F 08 5F 55 49 44 0A 03  _HID.A...._UID..
  1920: 14 0D 5F 44 49 53 08 70 0A 80 50 52 54 43 08 5F  .._DIS.p..PRTC._
  1930: 50 52 53 11 09 0A 06 23 F8 D4 18 79 00 14 38 5F  PRS....#...y..8_
  1940: 43 52 53 08 08 52 54 4C 43 11 09 0A 06 23 00 00  CRS..RTLC....#..
  1950: 18 79 00 8B 52 54 4C 43 01 49 52 51 30 70 00 49  .y..RTLC.IRQ0p.I
  1960: 52 51 30 79 01 7B 50 52 54 43 0A 0F 00 49 52 51  RQ0y.{PRTC...IRQ
  1970: 30 A4 52 54 4C 43 14 1B 5F 53 52 53 09 8B 68 01  0.RTLC.._SRS..h.
  1980: 49 52 51 30 82 49 52 51 30 60 76 60 70 60 50 52  IRQ0.IRQ0`v`p`PR
  1990: 54 43 14 18 5F 53 54 41 08 A0 0C 7B 50 52 54 43  TC.._STA...{PRTC
  19A0: 0A 80 00 A4 0A 09 A1 04 A4 0A 0B 5B 82 42 0A 4C  ...........[.B.L
  19B0: 4E 4B 44 08 5F 48 49 44 0C 41 D0 0C 0F 08 5F 55  NKD._HID.A...._U
  19C0: 49 44 0A 04 14 0D 5F 44 49 53 08 70 0A 80 50 52  ID...._DIS.p..PR
  19D0: 54 44 08 5F 50 52 53 11 09 0A 06 23 F8 D8 18 79  TD._PRS....#...y
  19E0: 00 14 38 5F 43 52 53 08 08 52 54 4C 44 11 09 0A  ..8_CRS..RTLD...
  19F0: 06 23 00 00 18 79 00 8B 52 54 4C 44 01 49 52 51  .#...y..RTLD.IRQ
  1A00: 30 70 00 49 52 51 30 79 01 7B 50 52 54 44 0A 0F  0p.IRQ0y.{PRTD..
  1A10: 00 49 52 51 30 A4 52 54 4C 44 14 1B 5F 53 52 53  .IRQ0.RTLD.._SRS
  1A20: 09 8B 68 01 49 52 51 30 82 49 52 51 30 60 76 60  ..h.IRQ0.IRQ0`v`
  1A30: 70 60 50 52 54 44 14 18 5F 53 54 41 08 A0 0C 7B  p`PRTD.._STA...{
  1A40: 50 52 54 44 0A 80 00 A4 0A 09 A1 04 A4 0A 0B 5B  PRTD...........[
  1A50: 82 42 0A 4C 4E 4B 45 08 5F 48 49 44 0C 41 D0 0C  .B.LNKE._HID.A..
  1A60: 0F 08 5F 55 49 44 0A 05 14 0D 5F 44 49 53 08 70  .._UID...._DIS.p
  1A70: 0A 80 50 52 54 45 08 5F 50 52 53 11 09 0A 06 23  ..PRTE._PRS....#
  1A80: F8 D4 18 79 00 14 38 5F 43 52 53 08 08 52 54 4C  ...y..8_CRS..RTL
  1A90: 45 11 09 0A 06 23 00 00 18 79 00 8B 52 54 4C 45  E....#...y..RTLE
  1AA0: 01 49 52 51 30 70 00 49 52 51 30 79 01 7B 50 52  .IRQ0p.IRQ0y.{PR
  1AB0: 54 45 0A 0F 00 49 52 51 30 A4 52 54 4C 45 14 1B  TE...IRQ0.RTLE..
  1AC0: 5F 53 52 53 09 8B 68 01 49 52 51 30 82 49 52 51  _SRS..h.IRQ0.IRQ
  1AD0: 30 60 76 60 70 60 50 52 54 45 14 18 5F 53 54 41  0`v`p`PRTE.._STA
  1AE0: 08 A0 0C 7B 50 52 54 45 0A 80 00 A4 0A 09 A1 04  ...{PRTE........
  1AF0: A4 0A 0B 5B 82 42 0A 4C 4E 4B 46 08 5F 48 49 44  ...[.B.LNKF._HID
  1B00: 0C 41 D0 0C 0F 08 5F 55 49 44 0A 06 14 0D 5F 44  .A...._UID...._D
  1B10: 49 53 08 70 0A 80 50 52 54 46 08 5F 50 52 53 11  IS.p..PRTF._PRS.
  1B20: 09 0A 06 23 F8 D8 18 79 00 14 38 5F 43 52 53 08  ...#...y..8_CRS.
  1B30: 08 52 54 4C 46 11 09 0A 06 23 00 00 18 79 00 8B  .RTLF....#...y..
  1B40: 52 54 4C 46 01 49 52 51 30 70 00 49 52 51 30 79  RTLF.IRQ0p.IRQ0y
  1B50: 01 7B 50 52 54 46 0A 0F 00 49 52 51 30 A4 52 54  .{PRTF...IRQ0.RT
  1B60: 4C 46 14 1B 5F 53 52 53 09 8B 68 01 49 52 51 30  LF.._SRS..h.IRQ0
  1B70: 82 49 52 51 30 60 76 60 70 60 50 52 54 46 14 18  .IRQ0`v`p`PRTF..
  1B80: 5F 53 54 41 08 A0 0C 7B 50 52 54 46 0A 80 00 A4  _STA...{PRTF....
  1B90: 0A 09 A1 04 A4 0A 0B 5B 82 42 0A 4C 4E 4B 47 08  .......[.B.LNKG.
  1BA0: 5F 48 49 44 0C 41 D0 0C 0F 08 5F 55 49 44 0A 07  _HID.A...._UID..
  1BB0: 14 0D 5F 44 49 53 08 70 0A 80 50 52 54 47 08 5F  .._DIS.p..PRTG._
  1BC0: 50 52 53 11 09 0A 06 23 F8 D4 18 79 00 14 38 5F  PRS....#...y..8_
  1BD0: 43 52 53 08 08 52 54 4C 47 11 09 0A 06 23 00 00  CRS..RTLG....#..
  1BE0: 18 79 00 8B 52 54 4C 47 01 49 52 51 30 70 00 49  .y..RTLG.IRQ0p.I
  1BF0: 52 51 30 79 01 7B 50 52 54 47 0A 0F 00 49 52 51  RQ0y.{PRTG...IRQ
  1C00: 30 A4 52 54 4C 47 14 1B 5F 53 52 53 09 8B 68 01  0.RTLG.._SRS..h.
  1C10: 49 52 51 30 82 49 52 51 30 60 76 60 70 60 50 52  IRQ0.IRQ0`v`p`PR
  1C20: 54 47 14 18 5F 53 54 41 08 A0 0C 7B 50 52 54 47  TG.._STA...{PRTG
  1C30: 0A 80 00 A4 0A 09 A1 04 A4 0A 0B 5B 82 42 0A 4C  ...........[.B.L
  1C40: 4E 4B 48 08 5F 48 49 44 0C 41 D0 0C 0F 08 5F 55  NKH._HID.A...._U
  1C50: 49 44 0A 08 14 0D 5F 44 49 53 08 70 0A 80 50 52  ID...._DIS.p..PR
  1C60: 54 48 08 5F 50 52 53 11 09 0A 06 23 F8 D8 18 79  TH._PRS....#...y
  1C70: 00 14 38 5F 43 52 53 08 08 52 54 4C 48 11 09 0A  ..8_CRS..RTLH...
  1C80: 06 23 00 00 18 79 00 8B 52 54 4C 48 01 49 52 51  .#...y..RTLH.IRQ
  1C90: 30 70 00 49 52 51 30 79 01 7B 50 52 54 48 0A 0F  0p.IRQ0y.{PRTH..
  1CA0: 00 49 52 51 30 A4 52 54 4C 48 14 1B 5F 53 52 53  .IRQ0.RTLH.._SRS
  1CB0: 09 8B 68 01 49 52 51 30 82 49 52 51 30 60 76 60  ..h.IRQ0.IRQ0`v`
  1CC0: 70 60 50 52 54 48 14 18 5F 53 54 41 08 A0 0C 7B  p`PRTH.._STA...{
  1CD0: 50 52 54 48 0A 80 00 A4 0A 09 A1 04 A4 0A 0B 5B  PRTH...........[
  1CE0: 82 45 BC 45 43 5F 5F 08 5F 48 49 44 0C 41 D0 0C  .E.EC__._HID.A..
  1CF0: 09 08 5F 55 49 44 00 08 5F 47 50 45 0A 1C 5B 01  .._UID.._GPE..[.
  1D00: 45 43 4C 4B 00 5B 80 45 52 41 4D 03 00 0B 00 01  ECLK.[.ERAM.....
  1D10: 5B 81 4D 08 45 52 41 4D 01 00 10 44 4B 52 31 01  [.M.ERAM...DKR1.
  1D20: 00 17 48 53 50 41 01 00 37 4C 45 44 53 08 00 10  ..HSPA..7LEDS...
  1D30: 00 07 54 42 53 57 01 00 40 05 44 4B 52 32 01 00  ..TBSW..@.DKR2..
  1D40: 4F 07 45 56 4E 54 08 00 28 00 06 41 4C 4D 54 01  O.EVNT..(..ALMT.
  1D50: 00 49 04 41 4D 55 54 01 00 03 42 54 45 42 01 57  .I.AMUT...BTEB.W
  1D60: 4C 45 42 01 57 57 45 42 01 00 01 00 01 4B 42 4C  LEB.WWEB.....KBL
  1D70: 54 01 00 02 55 53 50 57 01 00 43 09 57 41 4B 45  T...USPW..C.WAKE
  1D80: 10 00 40 14 54 4D 50 30 08 54 4D 50 31 08 00 38  ..@.TMP0.TMP1..8
  1D90: 50 41 47 45 08 00 40 3E 00 04 44 4B 52 33 01 14  PAGE..@>..DKR3..
  1DA0: 26 5F 43 52 53 00 08 45 43 4D 44 11 15 0A 12 47  &_CRS..ECMD....G
  1DB0: 01 62 00 62 00 01 01 47 01 66 00 66 00 01 01 79  .b.b...G.f.f...y
  1DC0: 00 A4 45 43 4D 44 14 0C 54 4C 45 44 01 70 68 4C  ..ECMD..TLED.phL
  1DD0: 45 44 53 14 0E 4C 45 44 5F 02 54 4C 45 44 7D 68  EDS..LED_.TLED}h
  1DE0: 69 00 14 06 5F 49 4E 49 00 14 0C 4D 55 54 45 01  i..._INI...MUTE.
  1DF0: 70 68 41 4D 55 54 14 18 52 41 44 49 01 70 68 57  phAMUT..RADI.phW
  1E00: 4C 45 42 70 68 57 57 45 42 70 68 42 54 45 42 14  LEBphWWEBphBTEB.
  1E10: 0C 55 53 42 50 01 70 68 55 53 50 57 14 0D 5F 51  .USBP.phUSPW.._Q
  1E20: 31 33 00 86 53 4C 50 42 0A 80 14 12 5F 51 31 34  13..SLPB...._Q14
  1E30: 00 5E 5E 5E 2E 47 46 58 30 49 4E 43 42 14 12 5F  .^^^.GFX0INCB.._
  1E40: 51 31 35 00 5E 5E 5E 2E 47 46 58 30 44 45 43 42  Q15.^^^.GFX0DECB
  1E50: 14 0D 5F 51 31 36 00 86 47 46 58 30 0A 82 14 0D  .._Q16..GFX0....
  1E60: 5F 51 32 36 00 86 41 43 5F 5F 0A 80 14 14 5F 51  _Q26..AC__...._Q
  1E70: 32 37 00 86 41 43 5F 5F 0A 80 70 0A 50 45 56 4E  27..AC__..p.PEVN
  1E80: 54 14 0D 5F 51 32 41 00 86 4C 49 44 5F 0A 80 14  T.._Q2A..LID_...
  1E90: 0D 5F 51 32 42 00 86 4C 49 44 5F 0A 80 14 11 5F  ._Q2B..LID_...._
  1EA0: 51 31 30 00 5E 2E 48 4B 45 59 52 48 4B 5F 01 14  Q10.^.HKEYRHK_..
  1EB0: 12 5F 51 31 31 00 5E 2E 48 4B 45 59 52 48 4B 5F  ._Q11.^.HKEYRHK_
  1EC0: 0A 02 14 12 5F 51 31 32 00 5E 2E 48 4B 45 59 52  ...._Q12.^.HKEYR
  1ED0: 48 4B 5F 0A 03 14 12 5F 51 36 34 00 5E 2E 48 4B  HK_...._Q64.^.HK
  1EE0: 45 59 52 48 4B 5F 0A 05 14 12 5F 51 36 35 00 5E  EYRHK_...._Q65.^
  1EF0: 2E 48 4B 45 59 52 48 4B 5F 0A 06 14 12 5F 51 31  .HKEYRHK_...._Q1
  1F00: 37 00 5E 2E 48 4B 45 59 52 48 4B 5F 0A 08 14 12  7.^.HKEYRHK_....
  1F10: 5F 51 36 36 00 5E 2E 48 4B 45 59 52 48 4B 5F 0A  _Q66.^.HKEYRHK_.
  1F20: 0A 14 12 5F 51 36 41 00 5E 2E 48 4B 45 59 52 48  ..._Q6A.^.HKEYRH
  1F30: 4B 5F 0A 1B 14 12 5F 51 31 41 00 5E 2E 48 4B 45  K_...._Q1A.^.HKE
  1F40: 59 52 48 4B 5F 0A 0B 14 12 5F 51 31 42 00 5E 2E  YRHK_...._Q1B.^.
  1F50: 48 4B 45 59 52 48 4B 5F 0A 0C 14 12 5F 51 36 32  HKEYRHK_...._Q62
  1F60: 00 5E 2E 48 4B 45 59 52 48 4B 5F 0A 0D 14 12 5F  .^.HKEYRHK_...._
  1F70: 51 36 30 00 5E 2E 48 4B 45 59 52 48 4B 5F 0A 0E  Q60.^.HKEYRHK_..
  1F80: 14 12 5F 51 36 31 00 5E 2E 48 4B 45 59 52 48 4B  .._Q61.^.HKEYRHK
  1F90: 5F 0A 0F 14 12 5F 51 31 46 00 5E 2E 48 4B 45 59  _...._Q1F.^.HKEY
  1FA0: 52 48 4B 5F 0A 12 14 12 5F 51 36 37 00 5E 2E 48  RHK_...._Q67.^.H
  1FB0: 4B 45 59 52 48 4B 5F 0A 13 14 12 5F 51 36 33 00  KEYRHK_...._Q63.
  1FC0: 5E 2E 48 4B 45 59 52 48 4B 5F 0A 14 14 12 5F 51  ^.HKEYRHK_...._Q
  1FD0: 31 39 00 5E 2E 48 4B 45 59 52 48 4B 5F 0A 18 14  19.^.HKEYRHK_...
  1FE0: 12 5F 51 31 43 00 5E 2E 48 4B 45 59 52 48 4B 5F  ._Q1C.^.HKEYRHK_
  1FF0: 0A 19 14 12 5F 51 31 44 00 5E 2E 48 4B 45 59 52  ...._Q1D.^.HKEYR
  2000: 48 4B 5F 0A 1A 14 12 5F 51 35 43 00 5E 2E 48 4B  HK_...._Q5C.^.HK
  2010: 45 59 52 54 41 42 0A 0B 14 12 5F 51 35 44 00 5E  EYRTAB...._Q5D.^
  2020: 2E 48 4B 45 59 52 54 41 42 0A 0C 14 12 5F 51 35  .HKEYRTAB...._Q5
  2030: 45 00 5E 2E 48 4B 45 59 52 54 41 42 0A 09 14 12  E.^.HKEYRTAB....
  2040: 5F 51 35 46 00 5E 2E 48 4B 45 59 52 54 41 42 0A  _Q5F.^.HKEYRTAB.
  2050: 0A 5B 82 4E 17 48 4B 45 59 08 5F 48 49 44 0C 24  .[.N.HKEY._HID.$
  2060: 4D 00 68 08 42 54 4E 5F 00 08 42 54 41 42 00 08  M.h.BTN_..BTAB..
  2070: 44 48 4B 4E 0B 0C 08 08 45 4D 53 4B 00 08 45 54  DHKN....EMSK..ET
  2080: 41 42 00 08 45 4E 5F 5F 00 14 09 5F 53 54 41 00  AB..EN__..._STA.
  2090: A4 0A 0F 14 3C 4D 48 4B 50 00 70 42 54 4E 5F 60  ....<MHKP.pBTN_`
  20A0: A0 13 92 93 60 00 70 00 42 54 4E 5F 72 60 0B 00  ....`.p.BTN_r`..
  20B0: 10 60 A4 60 70 42 54 41 42 60 A0 13 92 93 60 00  .`.`pBTAB`....`.
  20C0: 70 00 42 54 41 42 72 60 0B 00 50 60 A4 60 A4 00  p.BTABr`..P`.`..
  20D0: 14 23 52 48 4B 5F 01 79 01 74 68 01 00 60 A0 15  .#RHK_.y.th..`..
  20E0: 7B 45 4D 53 4B 60 00 70 68 42 54 4E 5F 86 48 4B  {EMSK`.phBTN_.HK
  20F0: 45 59 0A 80 14 23 52 54 41 42 01 79 01 74 68 01  EY...#RTAB.y.th.
  2100: 00 60 A0 15 7B 45 54 41 42 60 00 70 68 42 54 41  .`..{ETAB`.phBTA
  2110: 42 86 48 4B 45 59 0A 80 14 2C 4D 48 4B 43 01 A0  B.HKEY...,MHKC..
  2120: 11 68 70 44 48 4B 4E 45 4D 53 4B 70 FF 45 54 41  .hpDHKNEMSKp.ETA
  2130: 42 A1 0D 70 00 45 4D 53 4B 70 00 45 54 41 42 70  B..p.EMSKp.ETABp
  2140: 68 45 4E 5F 5F 14 3E 4D 48 4B 4D 02 A0 37 92 94  hEN__.>MHKM..7..
  2150: 68 0A 20 79 01 74 68 01 00 60 A0 0C 69 7D 44 48  h. y.th..`..i}DH
  2160: 4B 4E 60 44 48 4B 4E A1 0D 7B 44 48 4B 4E 80 60  KN`DHKN..{DHKN.`
  2170: 00 44 48 4B 4E A0 0E 45 4E 5F 5F 70 44 48 4B 4E  .DHKN..EN__pDHKN
  2180: 45 4D 53 4B 14 0C 4D 48 4B 41 00 A4 0C FF FF FF  EMSK..MHKA......
  2190: 07 14 0F 4D 48 4B 47 00 A4 79 54 42 53 57 0A 03  ...MHKG..yTBSW..
  21A0: 00 14 0C 53 53 4D 53 01 70 68 41 4C 4D 54 14 17  ...SSMS.phALMT..
  21B0: 4D 4D 54 53 01 A0 08 68 54 4C 45 44 0A 8E A1 07  MMTS...hTLED....
  21C0: 54 4C 45 44 0A 0E 14 0A 4D 48 4B 56 00 A4 0B 00  TLED....MHKV....
  21D0: 01 5B 81 10 45 52 41 4D 01 00 40 23 00 04 48 50  .[..ERAM..@#..HP
  21E0: 41 43 01 5B 82 3C 41 43 5F 5F 08 5F 48 49 44 0D  AC.[.<AC__._HID.
  21F0: 41 43 50 49 30 30 30 33 00 08 5F 55 49 44 00 08  ACPI0003.._UID..
  2200: 5F 50 43 4C 12 06 01 5F 53 42 5F 14 0B 5F 50 53  _PCL..._SB_.._PS
  2210: 52 00 A4 48 50 41 43 14 09 5F 53 54 41 00 A4 0A  R..HPAC.._STA...
  2220: 0F 5B 81 35 45 52 41 4D 01 00 40 1C 42 30 53 54  .[.5ERAM..@.B0ST
  2230: 04 00 01 42 30 43 48 01 42 30 44 49 01 42 30 50  ...B0CH.B0DI.B0P
  2240: 52 01 42 31 53 54 04 00 01 42 31 43 48 01 42 31  R.B1ST...B1CH.B1
  2250: 44 49 01 42 31 50 52 01 5B 81 1F 45 52 41 4D 01  DI.B1PR.[..ERAM.
  2260: 00 40 50 42 41 52 43 10 42 41 46 43 10 00 20 42  .@PBARC.BAFC.. B
  2270: 41 50 52 10 42 41 56 4F 10 5B 81 10 45 52 41 4D  APR.BAVO.[..ERAM
  2280: 01 00 40 50 00 0F 42 41 4D 41 01 5B 81 1E 45 52  ..@P..BAMA.[..ER
  2290: 41 4D 01 00 40 50 42 41 44 43 10 42 41 44 56 10  AM..@PBADC.BADV.
  22A0: 00 10 00 10 00 10 42 41 53 4E 10 5B 81 0E 45 52  ......BASN.[..ER
  22B0: 41 4D 01 00 40 50 42 41 54 59 20 5B 81 0F 45 52  AM..@PBATY [..ER
  22C0: 41 4D 01 00 40 50 42 41 4F 45 40 08 5B 81 0F 45  AM..@PBAOE@.[..E
  22D0: 52 41 4D 01 00 40 50 42 41 4E 41 40 08 14 0C 42  RAM..@PBANA@...B
  22E0: 50 41 47 01 70 68 50 41 47 45 14 4E 09 42 53 54  PAG.phPAGE.N.BST
  22F0: 41 04 5B 23 45 43 4C 4B FF FF 70 00 60 42 50 41  A.[#ECLK..p.`BPA
  2300: 47 7D 01 68 00 70 42 41 4D 41 61 42 50 41 47 68  G}.h.pBAMAaBPAGh
  2310: 70 42 41 50 52 62 A0 07 6A 7D 0A 02 60 60 A1 15  pBAPRb..j}..``..
  2320: A0 0E 6B 7D 01 60 60 74 0C 00 00 01 00 62 62 A1  ..k}.``t.....bb.
  2330: 04 70 00 62 A0 0A 92 95 62 0B 00 80 70 00 62 70  .p.b....b...p.bp
  2340: 60 88 69 00 00 A0 1F 61 77 42 41 52 43 0A 0A 88  `.i....awBARC...
  2350: 69 0A 02 00 77 62 42 41 56 4F 62 78 62 0B E8 03  i...wbBAVObxb...
  2360: 00 88 69 01 00 A1 11 70 42 41 52 43 88 69 0A 02  ..i....pBARC.i..
  2370: 00 70 62 88 69 01 00 70 42 41 56 4F 88 69 0A 03  .pb.i..pBAVO.i..
  2380: 00 5B 27 45 43 4C 4B A4 69 14 40 10 42 49 4E 46  .['ECLK.i.@.BINF
  2390: 02 5B 23 45 43 4C 4B FF FF 42 50 41 47 7D 01 69  .[#ECLK..BPAG}.i
  23A0: 00 7F 42 41 4D 41 01 88 68 00 00 70 42 41 4D 41  ..BAMA..h..pBAMA
  23B0: 60 42 50 41 47 69 70 42 41 46 43 62 42 50 41 47  `BPAGipBAFCbBPAG
  23C0: 7D 0A 02 69 00 70 42 41 44 43 61 A0 0C 60 77 61  }..i.pBADCa..`wa
  23D0: 0A 0A 61 77 62 0A 0A 62 70 61 88 68 01 00 70 62  ..awb..bpa.h..pb
  23E0: 88 68 0A 02 00 70 42 41 44 56 88 68 0A 04 00 78  .h...pBADV.h...x
  23F0: 62 0A 14 60 88 68 0A 05 00 70 42 41 53 4E 60 08  b..`.h...pBASN`.
  2400: 53 45 52 4E 11 09 0A 06 20 20 20 20 20 00 70 0A  SERN....     .p.
  2410: 04 61 A2 15 60 78 60 0A 0A 62 60 72 62 0A 30 88  .a..`x`..b`rb.0.
  2420: 53 45 52 4E 61 00 76 61 70 53 45 52 4E 88 68 0A  SERNa.vapSERN.h.
  2430: 0A 00 42 50 41 47 7D 0A 04 69 00 08 54 59 50 45  ..BPAG}..i..TYPE
  2440: 11 08 0A 05 00 00 00 00 00 70 42 41 54 59 54 59  .........pBATYTY
  2450: 50 45 70 54 59 50 45 88 68 0A 0B 00 42 50 41 47  PEpTYPE.h...BPAG
  2460: 7D 0A 05 69 00 70 42 41 4F 45 88 68 0A 0C 00 42  }..i.pBAOE.h...B
  2470: 50 41 47 7D 0A 06 69 00 70 42 41 4E 41 88 68 0A  PAG}..i.pBANA.h.
  2480: 09 00 5B 27 45 43 4C 4B A4 68 5B 82 41 0A 42 41  ..['ECLK.h[.A.BA
  2490: 54 30 08 5F 48 49 44 0C 41 D0 0C 0A 08 5F 55 49  T0._HID.A...._UI
  24A0: 44 00 08 5F 50 43 4C 12 06 01 5F 53 42 5F 08 42  D.._PCL..._SB_.B
  24B0: 41 54 53 12 1E 0D 00 0C FF FF FF FF 0C FF FF FF  ATS.............
  24C0: FF 01 0B 30 2A 00 0A C8 01 01 0D 00 0D 00 0D 00  ...0*...........
  24D0: 0D 00 14 10 5F 42 49 46 00 A4 42 49 4E 46 42 41  ...._BIF..BINFBA
  24E0: 54 53 00 08 42 41 54 49 12 06 04 00 00 00 00 14  TS..BATI........
  24F0: 28 5F 42 53 54 00 A0 17 42 30 50 52 A4 42 53 54  (_BST...B0PR.BST
  2500: 41 00 42 41 54 49 42 30 43 48 42 30 44 49 A1 09  A.BATIB0CHB0DI..
  2510: A4 12 06 04 00 00 00 00 14 14 5F 53 54 41 00 A0  .........._STA..
  2520: 08 42 30 50 52 A4 0A 1F A1 04 A4 0A 0F 5B 82 43  .B0PR........[.C
  2530: 0A 42 41 54 31 08 5F 48 49 44 0C 41 D0 0C 0A 08  .BAT1._HID.A....
  2540: 5F 55 49 44 00 08 5F 50 43 4C 12 06 01 5F 53 42  _UID.._PCL..._SB
  2550: 5F 08 42 41 54 53 12 1E 0D 00 0C FF FF FF FF 0C  _.BATS..........
  2560: FF FF FF FF 01 0B 30 2A 00 0A C8 01 01 0D 00 0D  ......0*........
  2570: 00 0D 00 0D 00 14 11 5F 42 49 46 00 A4 42 49 4E  ......._BIF..BIN
  2580: 46 42 41 54 53 0A 10 08 42 41 54 49 12 06 04 00  FBATS...BATI....
  2590: 00 00 00 14 29 5F 42 53 54 00 A0 18 42 31 50 52  ....)_BST...B1PR
  25A0: A4 42 53 54 41 0A 10 42 41 54 49 42 31 43 48 42  .BSTA..BATIB1CHB
  25B0: 31 44 49 A1 09 A4 12 06 04 00 00 00 00 14 14 5F  1DI............_
  25C0: 53 54 41 00 A0 08 42 31 50 52 A4 0A 1F A1 04 A4  STA...B1PR......
  25D0: 0A 0F 14 0D 5F 51 32 34 00 86 42 41 54 30 0A 80  ...._Q24..BAT0..
  25E0: 14 0D 5F 51 32 35 00 86 42 41 54 31 0A 80 14 0D  .._Q25..BAT1....
  25F0: 5F 51 34 41 00 86 42 41 54 30 0A 81 14 0D 5F 51  _Q4A..BAT0...._Q
  2600: 34 42 00 86 42 41 54 30 0A 80 14 0D 5F 51 34 43  4B..BAT0...._Q4C
  2610: 00 86 42 41 54 31 0A 81 14 0D 5F 51 34 44 00 86  ..BAT1...._Q4D..
  2620: 42 41 54 31 0A 80 5B 81 18 45 52 41 4D 01 00 40  BAT1..[..ERAM..@
  2630: 19 00 04 57 4B 46 4E 01 00 43 28 46 4E 4B 59 08  ...WKFN..C(FNKY.
  2640: 5B 82 44 04 53 4C 50 42 08 5F 48 49 44 0C 41 D0  [.D.SLPB._HID.A.
  2650: 0C 0E 14 0E 5F 50 52 57 00 A4 12 06 02 0A 18 0A  ...._PRW........
  2660: 03 14 24 5F 50 53 57 01 A0 0F 68 70 0A 06 46 4E  ..$_PSW...hp..FN
  2670: 4B 59 70 01 57 4B 46 4E A1 0D 70 00 46 4E 4B 59  KYp.WKFN..p.FNKY
  2680: 70 00 57 4B 46 4E 5B 81 1A 45 52 41 4D 01 00 40  p.WKFN[..ERAM..@
  2690: 19 00 02 57 4B 4C 44 01 00 4D 09 00 02 4C 49 44  ...WKLD..M...LID
  26A0: 53 01 5B 82 47 04 4C 49 44 5F 08 5F 48 49 44 0D  S.[.G.LID_._HID.
  26B0: 50 4E 50 30 43 30 44 00 14 0B 5F 4C 49 44 00 A4  PNP0C0D..._LID..
  26C0: 4C 49 44 53 14 0E 5F 50 52 57 00 A4 12 06 02 0A  LIDS.._PRW......
  26D0: 18 0A 03 14 17 5F 50 53 57 01 A0 08 68 70 01 57  ....._PSW...hp.W
  26E0: 4B 4C 44 A1 07 70 00 57 4B 4C 44 5B 81 0D 45 52  KLD..p.WKLD[..ER
  26F0: 41 4D 01 00 30 53 4E 44 53 08 14 0C 42 45 45 50  AM..0SNDS...BEEP
  2700: 01 70 68 53 4E 44 53 10 41 0B 5C 5F 54 5A 5F 14  .phSNDS.A.\_TZ_.
  2710: 2A 43 32 4B 5F 01 77 68 0A 0A 60 72 60 0B AC 0A  *C2K_.wh..`r`...
  2720: 60 A0 0B 92 94 60 0B AC 0A A4 0B B8 0B A0 0A 94  `....`..........
  2730: 60 0B AC 0F A4 0B B8 0B A4 60 5B 85 36 54 48 4D  `........`[.6THM
  2740: 30 14 0D 5F 43 52 54 00 A4 43 32 4B 5F 0A 7F 14  0.._CRT..C2K_...
  2750: 22 5F 54 4D 50 00 A4 43 32 4B 5F 5C 2F 05 5F 53  "_TMP..C2K_\/._S
  2760: 42 5F 50 43 49 30 4C 50 43 42 45 43 5F 5F 54 4D  B_PCI0LPCBEC__TM
  2770: 50 30 5B 85 45 04 54 48 4D 31 14 0D 5F 43 52 54  P0[.E.THM1.._CRT
  2780: 00 A4 43 32 4B 5F 0A 63 14 0D 5F 50 53 56 00 A4  ..C2K_.c.._PSV..
  2790: 43 32 4B 5F 0A 5E 14 22 5F 54 4D 50 00 A4 43 32  C2K_.^."_TMP..C2
  27A0: 4B 5F 5C 2F 05 5F 53 42 5F 50 43 49 30 4C 50 43  K_\/._SB_PCI0LPC
  27B0: 42 45 43 5F 5F 54 4D 50 31 10 4C 0E 5C 5F 53 49  BEC__TMP1.L.\_SI
  27C0: 5F 14 44 0E 5F 53 53 54 01 A0 35 93 68 00 5C 2F  _.D._SST..5.h.\/
  27D0: 05 5F 53 42 5F 50 43 49 30 4C 50 43 42 45 43 5F  ._SB_PCI0LPCBEC_
  27E0: 5F 54 4C 45 44 00 5C 2F 05 5F 53 42 5F 50 43 49  _TLED.\/._SB_PCI
  27F0: 30 4C 50 43 42 45 43 5F 5F 54 4C 45 44 0A 07 A0  0LPCBEC__TLED...
  2800: 36 93 68 01 5C 2F 05 5F 53 42 5F 50 43 49 30 4C  6.h.\/._SB_PCI0L
  2810: 50 43 42 45 43 5F 5F 54 4C 45 44 0A 80 5C 2F 05  PCBEC__TLED..\/.
  2820: 5F 53 42 5F 50 43 49 30 4C 50 43 42 45 43 5F 5F  _SB_PCI0LPCBEC__
  2830: 54 4C 45 44 0A 07 A0 37 93 68 0A 02 5C 2F 05 5F  TLED...7.h..\/._
  2840: 53 42 5F 50 43 49 30 4C 50 43 42 45 43 5F 5F 54  SB_PCI0LPCBEC__T
  2850: 4C 45 44 0A 80 5C 2F 05 5F 53 42 5F 50 43 49 30  LED..\/._SB_PCI0
  2860: 4C 50 43 42 45 43 5F 5F 54 4C 45 44 0A C7 A0 37  LPCBEC__TLED...7
  2870: 93 68 0A 03 5C 2F 05 5F 53 42 5F 50 43 49 30 4C  .h..\/._SB_PCI0L
  2880: 50 43 42 45 43 5F 5F 54 4C 45 44 0A A0 5C 2F 05  PCBEC__TLED..\/.
  2890: 5F 53 42 5F 50 43 49 30 4C 50 43 42 45 43 5F 5F  _SB_PCI0LPCBEC__
  28A0: 54 4C 45 44 0A 87 5B 82 3D 44 4D 41 43 08 5F 48  TLED..[.=DMAC._H
  28B0: 49 44 0C 41 D0 02 00 08 5F 43 52 53 11 28 0A 25  ID.A...._CRS.(.%
  28C0: 47 01 00 00 00 00 01 20 47 01 81 00 81 00 01 11  G...... G.......
  28D0: 47 01 93 00 93 00 01 0D 47 01 C0 00 C0 00 01 20  G.......G...... 
  28E0: 2A 10 01 79 00 5B 82 26 46 57 48 5F 08 5F 48 49  *..y.[.&FWH_._HI
  28F0: 44 0C 25 D4 08 00 08 5F 43 52 53 11 11 0A 0E 86  D.%...._CRS.....
  2900: 09 00 00 00 00 00 FF 00 00 00 01 79 00 5B 82 4A  ...........y.[.J
  2910: 0A 48 50 45 54 08 5F 48 49 44 0C 41 D0 01 03 08  .HPET._HID.A....
  2920: 5F 43 49 44 0C 41 D0 0C 01 08 42 55 46 30 11 11  _CID.A....BUF0..
  2930: 0A 0E 86 09 00 00 00 00 D0 FE 00 04 00 00 79 00  ..............y.
  2940: 14 21 5F 53 54 41 00 A0 18 48 50 54 45 A0 0D 92  .!_STA...HPTE...
  2950: 95 4F 53 59 53 0B D1 07 A4 0A 0F A1 04 A4 0A 0B  .OSYS...........
  2960: A4 00 14 46 05 5F 43 52 53 08 A0 49 04 48 50 54  ...F._CRS..I.HPT
  2970: 45 8A 42 55 46 30 0A 04 48 50 54 30 A0 11 93 48  E.BUF0..HPT0...H
  2980: 50 41 53 01 70 0C 00 10 D0 FE 48 50 54 30 A0 12  PAS.p.....HPT0..
  2990: 93 48 50 41 53 0A 02 70 0C 00 20 D0 FE 48 50 54  .HPAS..p.. ..HPT
  29A0: 30 A0 12 93 48 50 41 53 0A 03 70 0C 00 30 D0 FE  0...HPAS..p..0..
  29B0: 48 50 54 30 A4 42 55 46 30 5B 82 45 0A 50 49 43  HPT0.BUF0[.E.PIC
  29C0: 5F 08 5F 48 49 44 0B 41 D0 08 5F 43 52 53 11 41  _._HID.A.._CRS.A
  29D0: 09 0A 8D 47 01 20 00 20 00 01 02 47 01 24 00 24  ...G. . ...G.$.$
  29E0: 00 01 02 47 01 28 00 28 00 01 02 47 01 2C 00 2C  ...G.(.(...G.,.,
  29F0: 00 01 02 47 01 30 00 30 00 01 02 47 01 34 00 34  ...G.0.0...G.4.4
  2A00: 00 01 02 47 01 38 00 38 00 01 02 47 01 3C 00 3C  ...G.8.8...G.<.<
  2A10: 00 01 02 47 01 A0 00 A0 00 01 02 47 01 A4 00 A4  ...G.......G....
  2A20: 00 01 02 47 01 A8 00 A8 00 01 02 47 01 AC 00 AC  ...G.......G....
  2A30: 00 01 02 47 01 B0 00 B0 00 01 02 47 01 B4 00 B4  ...G.......G....
  2A40: 00 01 02 47 01 B8 00 B8 00 01 02 47 01 BC 00 BC  ...G.......G....
  2A50: 00 01 02 47 01 D0 04 D0 04 01 02 22 04 00 79 00  ...G......."..y.
  2A60: 5B 82 25 4D 41 54 48 08 5F 48 49 44 0C 41 D0 0C  [.%MATH._HID.A..
  2A70: 04 08 5F 43 52 53 11 10 0A 0D 47 01 F0 00 F0 00  .._CRS....G.....
  2A80: 01 01 22 00 20 79 00 5B 82 43 08 4C 44 52 43 08  ..". y.[.C.LDRC.
  2A90: 5F 48 49 44 0C 41 D0 0C 02 08 5F 55 49 44 0A 02  _HID.A...._UID..
  2AA0: 08 5F 43 52 53 11 46 06 0A 62 47 01 2E 00 2E 00  ._CRS.F..bG.....
  2AB0: 01 02 47 01 4E 00 4E 00 01 02 47 01 61 00 61 00  ..G.N.N...G.a.a.
  2AC0: 01 01 47 01 63 00 63 00 01 01 47 01 65 00 65 00  ..G.c.c...G.e.e.
  2AD0: 01 01 47 01 67 00 67 00 01 01 47 01 80 00 80 00  ..G.g.g...G.....
  2AE0: 01 01 47 01 92 00 92 00 01 01 47 01 B2 00 B2 00  ..G.......G.....
  2AF0: 01 02 47 01 00 08 00 08 01 10 47 01 00 05 00 05  ..G.......G.....
  2B00: 01 80 47 01 80 04 80 04 01 40 79 00 5B 82 22 52  ..G......@y.[."R
  2B10: 54 43 5F 08 5F 48 49 44 0C 41 D0 0B 00 08 5F 43  TC_._HID.A...._C
  2B20: 52 53 11 0D 0A 0A 47 01 70 00 70 00 01 08 79 00  RS....G.p.p...y.
  2B30: 5B 82 2D 54 49 4D 52 08 5F 48 49 44 0C 41 D0 01  [.-TIMR._HID.A..
  2B40: 00 08 5F 43 52 53 11 18 0A 15 47 01 40 00 40 00  .._CRS....G.@.@.
  2B50: 01 04 47 01 50 00 50 00 10 04 22 01 00 79 00 5B  ..G.P.P..."..y.[
  2B60: 82 43 04 50 53 32 4B 08 5F 48 49 44 0C 41 D0 03  .C.PS2K._HID.A..
  2B70: 03 08 5F 43 49 44 0C 41 D0 03 0B 08 5F 43 52 53  .._CID.A...._CRS
  2B80: 11 19 0A 16 47 01 60 00 60 00 01 01 47 01 64 00  ....G.`.`...G.d.
  2B90: 64 00 01 01 23 02 00 01 79 00 14 09 5F 53 54 41  d...#...y..._STA
  2BA0: 00 A4 0A 0F 5B 82 28 50 53 32 4D 08 5F 48 49 44  ....[.(PS2M._HID
  2BB0: 0C 41 D0 0F 13 08 5F 43 52 53 11 09 0A 06 23 00  .A...._CRS....#.
  2BC0: 10 01 79 00 14 09 5F 53 54 41 00 A4 0A 0F 5B 82  ..y..._STA....[.
  2BD0: 46 0C 50 41 54 41 08 5F 41 44 52 0C 01 00 1F 00  F.PATA._ADR.....
  2BE0: 5B 82 44 0B 50 52 49 44 08 5F 41 44 52 00 14 4F  [.D.PRID._ADR..O
  2BF0: 05 5F 47 54 4D 00 08 50 42 55 46 11 17 0A 14 00  ._GTM..PBUF.....
  2C00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  2C10: 00 00 00 8A 50 42 55 46 00 50 49 4F 30 8A 50 42  ....PBUF.PIO0.PB
  2C20: 55 46 0A 04 44 4D 41 30 8A 50 42 55 46 0A 08 50  UF..DMA0.PBUF..P
  2C30: 49 4F 31 8A 50 42 55 46 0A 0C 44 4D 41 31 8A 50  IO1.PBUF..DMA1.P
  2C40: 42 55 46 0A 10 46 4C 41 47 A4 50 42 55 46 14 2D  BUF..FLAG.PBUF.-
  2C50: 5F 53 54 4D 03 8A 68 00 50 49 4F 30 8A 68 0A 04  _STM..h.PIO0.h..
  2C60: 44 4D 41 30 8A 68 0A 08 50 49 4F 31 8A 68 0A 0C  DMA0.h..PIO1.h..
  2C70: 44 4D 41 31 8A 68 0A 10 46 4C 41 47 5B 82 0B 44  DMA1.h..FLAG[..D
  2C80: 53 4B 30 08 5F 41 44 52 00 5B 82 0B 44 53 4B 31  SK0._ADR.[..DSK1
  2C90: 08 5F 41 44 52 01 5B 82 46 0C 53 41 54 41 08 5F  ._ADR.[.F.SATA._
  2CA0: 41 44 52 0C 02 00 1F 00 5B 82 44 0B 50 52 49 44  ADR.....[.D.PRID
  2CB0: 08 5F 41 44 52 00 14 4F 05 5F 47 54 4D 00 08 50  ._ADR..O._GTM..P
  2CC0: 42 55 46 11 17 0A 14 00 00 00 00 00 00 00 00 00  BUF.............
  2CD0: 00 00 00 00 00 00 00 00 00 00 00 8A 50 42 55 46  ............PBUF
  2CE0: 00 50 49 4F 30 8A 50 42 55 46 0A 04 44 4D 41 30  .PIO0.PBUF..DMA0
  2CF0: 8A 50 42 55 46 0A 08 50 49 4F 31 8A 50 42 55 46  .PBUF..PIO1.PBUF
  2D00: 0A 0C 44 4D 41 31 8A 50 42 55 46 0A 10 46 4C 41  ..DMA1.PBUF..FLA
  2D10: 47 A4 50 42 55 46 14 2D 5F 53 54 4D 03 8A 68 00  G.PBUF.-_STM..h.
  2D20: 50 49 4F 30 8A 68 0A 04 44 4D 41 30 8A 68 0A 08  PIO0.h..DMA0.h..
  2D30: 50 49 4F 31 8A 68 0A 0C 44 4D 41 31 8A 68 0A 10  PIO1.h..DMA1.h..
  2D40: 46 4C 41 47 5B 82 0B 44 53 4B 30 08 5F 41 44 52  FLAG[..DSK0._ADR
  2D50: 00 5B 82 0B 44 53 4B 31 08 5F 41 44 52 01 5B 82  .[..DSK1._ADR.[.
  2D60: 0F 53 42 55 53 08 5F 41 44 52 0C 03 00 1F 00 08  .SBUS._ADR......
  2D70: 5F 53 30 5F 12 06 04 00 00 00 00 08 5F 53 33 5F  _S0_........_S3_
  2D80: 12 08 04 0A 05 0A 05 00 00 08 5F 53 34 5F 12 08  .........._S4_..
  2D90: 04 0A 06 0A 06 00 00 08 5F 53 35 5F 12 08 04 0A  ........_S5_....
  2DA0: 07 0A 07 00 00 10 45 07 5F 53 42 5F 5B 80 44 4C  ......E._SB_[.DL
  2DB0: 50 43 01 0B 4C 16 01 5B 81 0D 44 4C 50 43 01 00  PC..L..[..DLPC..
  2DC0: 03 44 53 54 41 01 5B 82 43 05 44 4F 43 4B 08 5F  .DSTA.[.C.DOCK._
  2DD0: 48 49 44 0D 41 43 50 49 30 30 30 33 00 08 5F 55  HID.ACPI0003.._U
  2DE0: 49 44 00 08 5F 50 43 4C 12 06 01 5F 53 42 5F 14  ID.._PCL..._SB_.
  2DF0: 1F 5F 44 43 4B 01 A0 07 68 54 52 41 50 01 A1 07  ._DCK...hTRAP...
  2E00: 54 52 41 50 0A 02 7F 68 44 53 54 41 60 A4 60 14  TRAP...hDSTA`.`.
  2E10: 0B 5F 53 54 41 00 A4 44 53 54 41 10 3C 2F 04 5F  ._STA..DSTA.</._
  2E20: 53 42 5F 50 43 49 30 4C 50 43 42 45 43 5F 5F 14  SB_PCI0LPCBEC__.
  2E30: 0D 5F 51 31 38 00 86 44 4F 43 4B 0A 03 14 0D 5F  ._Q18..DOCK...._
  2E40: 51 35 30 00 86 44 4F 43 4B 0A 03 14 0C 5F 51 35  Q50..DOCK...._Q5
  2E50: 38 00 86 44 4F 43 4B 00                          8..DOCK.

FACS @ 0x000000007F725240
  0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00  FACS@...........
  0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................

FACP @ 0x000000007F7280E0
  0000: 46 41 43 50 F4 00 00 00 04 69 43 4F 52 45 20 20  FACP.....iCORE  
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  COREBOOT....CORE
  0020: 00 00 00 00 40 52 72 7F 80 52 72 7F 01 02 09 00  ....@Rr..Rr.....
  0030: B2 00 00 00 E1 1E 00 80 00 05 00 00 00 00 00 00  ................
  0040: 04 05 00 00 00 00 00 00 20 05 00 00 08 05 00 00  ........ .......
  0050: 28 05 00 00 00 00 00 00 04 02 01 04 08 00 00 85  (...............
  0060: 01 00 23 00 00 00 00 00 01 03 0D 00 32 03 00 00  ..#.........2...
  0070: AD 86 00 00 01 08 00 01 F9 0C 00 00 00 00 00 00  ................
  0080: 06 00 00 00 40 52 72 7F 00 00 00 00 80 52 72 7F  ....@Rr......Rr.
  0090: 00 00 00 00 01 20 00 03 00 05 00 00 00 00 00 00  ..... ..........
  00A0: 00 00 00 00 00 00 00 00 00 00 00 00 01 10 00 02  ................
  00B0: 04 05 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  00C0: 00 00 00 00 01 08 00 01 20 05 00 00 00 00 00 00  ........ .......
  00D0: 01 20 00 03 08 05 00 00 00 00 00 00 01 40 00 03  . ...........@..
  00E0: 28 05 00 00 00 00 00 00 00 00 00 00 00 00 00 00  (...............
  00F0: 00 00 00 00                                      ....

SSDT @ 0x000000007F7281E0
  0000: 53 53 44 54 24 05 00 00 02 AB 43 4F 52 45 20 20  SSDT$.....CORE  
  0010: 43 4F 52 45 42 4F 4F 54 2A 00 00 00 43 4F 52 45  COREBOOT*...CORE
  0020: 2A 00 00 00 5B 82 82 04 00 43 54 42 4C 08 5F 48  *...[....CTBL._H
  0030: 49 44 0D 42 4F 4F 54 30 30 30 30 00 08 5F 55 49  ID.BOOT0000.._UI
  0040: 44 00 14 8B 00 00 5F 53 54 41 00 A4 0A 0F 08 5F  D....._STA....._
  0050: 43 52 53 11 84 01 00 0B 10 00 86 09 00 00 00 B0  CRS.............
  0060: 74 7F 00 80 00 00 79 00 10 89 08 00 5C 2F 03 5F  t.....y.....\/._
  0070: 53 42 5F 50 43 49 30 4C 50 43 42 5B 82 86 03 00  SB_PCI0LPCB[....
  0080: 44 54 52 5F 08 5F 48 49 44 0C 5C 23 F0 04 08 5F  DTR_._HID.\#..._
  0090: 43 52 53 11 83 01 00 0B 0F 00 47 01 00 02 00 02  CRS.......G.....
  00A0: 01 08 22 20 00 79 00 14 8B 00 00 5F 53 54 41 00  .." .y....._STA.
  00B0: A4 0A 0F 5B 82 8D 03 00 43 4F 4D 41 08 5F 48 49  ...[....COMA._HI
  00C0: 44 0C 41 D0 05 01 08 5F 55 49 44 0A 02 08 5F 43  D.A...._UID..._C
  00D0: 52 53 11 83 01 00 0B 0F 00 47 01 F8 03 F8 03 01  RS.......G......
  00E0: 08 22 10 00 79 00 14 8B 00 00 5F 53 54 41 00 A4  ."..y....._STA..
  00F0: 0A 0F 5B 83 89 17 00 5C 2E 5F 50 52 5F 43 50 30  ..[....\._PR_CP0
  0100: 30 00 10 05 00 00 06 08 5F 50 43 54 12 2C 02 11  0......._PCT.,..
  0110: 14 0A 11 82 0C 00 7F 00 00 00 00 00 00 00 00 00  ................
  0120: 00 00 79 00 11 14 0A 11 82 0C 00 7F 00 00 00 00  ..y.............
  0130: 00 00 00 00 00 00 00 79 00 08 5F 50 53 44 12 8C  .......y.._PSD..
  0140: 01 00 01 12 87 01 00 05 0A 05 0A 00 0C 00 00 00  ................
  0150: 00 0C FD 00 00 00 0C 02 00 00 00 08 5F 50 53 53  ............_PSS
  0160: 12 8D 06 00 03 12 82 02 00 06 0C 82 06 00 00 0C  ................
  0170: 18 79 00 00 0C 00 00 00 00 0C 00 00 00 00 0C 1B  .y..............
  0180: 0A 00 00 0C 1B 0A 00 00 12 82 02 00 06 0C 35 05  ..............5.
  0190: 00 00 0C 22 56 00 00 0C 00 00 00 00 0C 00 00 00  ..."V...........
  01A0: 00 0C 17 08 00 00 0C 17 08 00 00 12 82 02 00 06  ................
  01B0: 0C E8 03 00 00 0C 2C 33 00 00 0C 00 00 00 00 0C  ......,3........
  01C0: 00 00 00 00 0C 13 06 00 00 0C 13 06 00 00 14 8B  ................
  01D0: 00 00 5F 50 50 43 00 A4 0A 00 08 5F 43 53 54 12  .._PPC....._CST.
  01E0: 8D 08 00 04 0C 03 00 00 00 12 8B 02 00 04 11 87  ................
  01F0: 01 00 0B 13 00 82 0C 00 7F 01 02 00 00 00 00 00  ................
  0200: 00 00 00 00 79 00 0C 01 00 00 00 0C 01 00 00 00  ....y...........
  0210: 0C E8 03 00 00 12 8B 02 00 04 11 87 01 00 0B 13  ................
  0220: 00 82 0C 00 7F 01 02 00 10 00 00 00 00 00 00 00  ................
  0230: 79 00 0C 02 00 00 00 0C 01 00 00 00 0C F4 01 00  y...............
  0240: 00 12 8B 02 00 04 11 87 01 00 0B 13 00 82 0C 00  ................
  0250: 7F 01 02 00 20 00 00 00 00 00 00 00 79 00 0C 03  .... .......y...
  0260: 00 00 00 0C 11 00 00 00 0C FA 00 00 00 5B 83 89  .............[..
  0270: 17 00 5C 2E 5F 50 52 5F 43 50 30 31 01 00 00 00  ..\._PR_CP01....
  0280: 00 00 08 5F 50 43 54 12 2C 02 11 14 0A 11 82 0C  ..._PCT.,.......
  0290: 00 7F 00 00 00 00 00 00 00 00 00 00 00 79 00 11  .............y..
  02A0: 14 0A 11 82 0C 00 7F 00 00 00 00 00 00 00 00 00  ................
  02B0: 00 00 79 00 08 5F 50 53 44 12 8C 01 00 01 12 87  ..y.._PSD.......
  02C0: 01 00 05 0A 05 0A 00 0C 00 00 00 00 0C FD 00 00  ................
  02D0: 00 0C 02 00 00 00 08 5F 50 53 53 12 8D 06 00 03  ......._PSS.....
  02E0: 12 82 02 00 06 0C 82 06 00 00 0C 18 79 00 00 0C  ............y...
  02F0: 00 00 00 00 0C 00 00 00 00 0C 1B 0A 00 00 0C 1B  ................
  0300: 0A 00 00 12 82 02 00 06 0C 35 05 00 00 0C 22 56  .........5...."V
  0310: 00 00 0C 00 00 00 00 0C 00 00 00 00 0C 17 08 00  ................
  0320: 00 0C 17 08 00 00 12 82 02 00 06 0C E8 03 00 00  ................
  0330: 0C 2C 33 00 00 0C 00 00 00 00 0C 00 00 00 00 0C  .,3.............
  0340: 13 06 00 00 0C 13 06 00 00 14 8B 00 00 5F 50 50  ............._PP
  0350: 43 00 A4 0A 00 08 5F 43 53 54 12 8D 08 00 04 0C  C....._CST......
  0360: 03 00 00 00 12 8B 02 00 04 11 87 01 00 0B 13 00  ................
  0370: 82 0C 00 7F 01 02 00 00 00 00 00 00 00 00 00 79  ...............y
  0380: 00 0C 01 00 00 00 0C 01 00 00 00 0C E8 03 00 00  ................
  0390: 12 8B 02 00 04 11 87 01 00 0B 13 00 82 0C 00 7F  ................
  03A0: 01 02 00 10 00 00 00 00 00 00 00 79 00 0C 02 00  ...........y....
  03B0: 00 00 0C 01 00 00 00 0C F4 01 00 00 12 8B 02 00  ................
  03C0: 04 11 87 01 00 0B 13 00 82 0C 00 7F 01 02 00 20  ............... 
  03D0: 00 00 00 00 00 00 00 79 00 0C 03 00 00 00 0C 11  .......y........
  03E0: 00 00 00 0C FA 00 00 00 10 8B 13 00 5C 2F 03 5F  ............\/._
  03F0: 53 42 5F 50 43 49 30 47 46 58 30 14 8D 01 00 5F  SB_PCI0GFX0...._
  0400: 44 4F 44 00 A4 12 83 01 00 03 0C 00 01 01 80 0C  DOD.............
  0410: 40 02 01 80 0C 10 04 01 80 5B 82 87 04 00 56 47  @........[....VG
  0420: 41 30 08 5F 41 44 52 0C 00 01 00 00 14 81 01 00  A0._ADR.........
  0430: 5F 44 43 53 00 A4 5E 5E 58 44 43 53 0A 00 14 81  _DCS..^^XDCS....
  0440: 01 00 5F 44 47 53 00 A4 5E 5E 58 44 47 53 0A 00  .._DGS..^^XDGS..
  0450: 14 81 01 00 5F 44 53 53 00 5E 5E 58 44 53 53 0A  ...._DSS.^^XDSS.
  0460: 00 68 5B 82 87 04 00 54 56 30 5F 08 5F 41 44 52  .h[....TV0_._ADR
  0470: 0C 40 02 00 00 14 81 01 00 5F 44 43 53 00 A4 5E  .@......._DCS..^
  0480: 5E 58 44 43 53 0A 01 14 81 01 00 5F 44 47 53 00  ^XDCS......_DGS.
  0490: A4 5E 5E 58 44 47 53 0A 01 14 81 01 00 5F 44 53  .^^XDGS......_DS
  04A0: 53 00 5E 5E 58 44 53 53 0A 01 68 5B 82 87 07 00  S.^^XDSS..h[....
  04B0: 4C 43 44 30 08 5F 41 44 52 0C 10 04 00 00 14 8F  LCD0._ADR.......
  04C0: 00 00 5F 42 43 4C 00 A4 5E 5E 58 42 43 4C 14 8F  .._BCL..^^XBCL..
  04D0: 00 00 5F 42 43 4D 01 5E 5E 58 42 43 4D 68 14 8F  .._BCM.^^XBCMh..
  04E0: 00 00 5F 42 51 43 00 A4 5E 5E 58 42 51 43 14 81  .._BQC..^^XBQC..
  04F0: 01 00 5F 44 43 53 00 A4 5E 5E 58 44 43 53 0A 02  .._DCS..^^XDCS..
  0500: 14 81 01 00 5F 44 47 53 00 A4 5E 5E 58 44 47 53  ...._DGS..^^XDGS
  0510: 0A 02 14 81 01 00 5F 44 53 53 00 5E 5E 58 44 53  ......_DSS.^^XDS
  0520: 53 0A 02 68                                      S..h

MCFG @ 0x000000007F728710
  0000: 4D 43 46 47 3C 00 00 00 01 88 43 4F 52 45 20 20  MCFG<.....CORE  
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  COREBOOT....CORE
  0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F0  ................
  0030: 00 00 00 00 00 00 00 3F 00 00 00 00              .......?....

TCPA @ 0x000000007F728750
  0000: 54 43 50 41 32 00 00 00 02 74 43 4F 52 45 20 20  TCPA2....tCORE  
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  COREBOOT....CORE
  0020: 00 00 00 00 00 00 00 00 01 00 00 50 71 7F 00 00  ...........Pq...
  0030: 00 00                                            ..

APIC @ 0x000000007F728790
  0000: 41 50 49 43 68 00 00 00 01 6C 43 4F 52 45 20 20  APICh....lCORE  
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  COREBOOT....CORE
  0020: 00 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00  ................
  0030: 01 00 00 00 00 08 01 01 01 00 00 00 01 0C 02 00  ................
  0040: 00 00 C0 FE 00 00 00 00 04 06 00 05 00 01 04 06  ................
  0050: 01 05 00 01 02 0A 00 00 02 00 00 00 05 00 02 0A  ................
  0060: 00 09 09 00 00 00 0D 00                          ........

HPET @ 0x000000007F728800
  0000: 48 50 45 54 38 00 00 00 01 70 43 4F 52 45 20 20  HPET8....pCORE  
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  COREBOOT....CORE
  0020: 00 00 00 00 01 A2 86 80 00 40 00 00 00 00 D0 FE  .........@......
  0030: 00 00 00 00 00 80 00 00                          ........


^ permalink raw reply	[flat|nested] 20+ messages in thread

* RE: [Regression Linux 4.11] TPM module not loaded anymore
  2017-04-12 21:26                   ` [Regression Linux 4.11] TPM module not loaded anymore Paul Menzel
@ 2017-04-12 21:49                     ` Moore, Robert
  2017-04-13  7:19                       ` Paul Menzel
  0 siblings, 1 reply; 20+ messages in thread
From: Moore, Robert @ 2017-04-12 21:49 UTC (permalink / raw)
  To: Paul Menzel
  Cc: Jarkko Sakkinen, Maciej S. Szmigiero, linux-kernel,
	Arthur Heymans, tpmdd-devel, GNUtoo, Zheng, Lv, Wysocki,
	Rafael J, linux-acpi



> -----Original Message-----
> From: Paul Menzel [mailto:pmenzel@molgen.mpg.de]
> Sent: Wednesday, April 12, 2017 2:27 PM
> To: Moore, Robert <robert.moore@intel.com>
> Cc: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>; Maciej S.
> Szmigiero <mail@maciej.szmigiero.name>; linux-kernel@vger.kernel.org;
> Arthur Heymans <arthur@aheymans.xyz>; tpmdd-devel@lists.sourceforge.net;
> GNUtoo@no-log.org; Zheng, Lv <lv.zheng@intel.com>; Wysocki, Rafael J
> <rafael.j.wysocki@intel.com>; linux-acpi@vger.linux.org
> Subject: RE: [Regression Linux 4.11] TPM module not loaded anymore
> 
> Dear Robert,
> 
> 
> Thank you for looking into this.
> 
> 
> On 2017-04-12 17:54, Moore, Robert wrote:
> > And probably the dmesg if error messages appear in there.
> 
> Linux doesn’t log any messages, as the `tpm` module doesn’t load. Please
> find the output of `sudo acpidump` attached.
> 
> […]
> 
[Moore, Robert] 

Do you have any idea what control method(s) are executing? The DSDT and SSDT in the acpidump load fine here, and all predefined control methods in these tables execute OK.

We need to root-cause this problem, as a simple revert will break the customers that the fix was intended for in the first place.

Bob


> 
> Kind regards,
> 
> Paul
> 
> 
> PS: Doesn’t your mail client support to easily reply in interleaved
> style?

^ permalink raw reply	[flat|nested] 20+ messages in thread

* RE: [Regression Linux 4.11] TPM module not loaded anymore
  2017-04-12 21:49                     ` Moore, Robert
@ 2017-04-13  7:19                       ` Paul Menzel
  0 siblings, 0 replies; 20+ messages in thread
From: Paul Menzel @ 2017-04-13  7:19 UTC (permalink / raw)
  To: Robert Moore
  Cc: Jarkko Sakkinen, Maciej S. Szmigiero, linux-kernel,
	Arthur Heymans, tpmdd-devel, GNUtoo, Zheng, Lv, Wysocki,
	Rafael J, linux-acpi

Dear Robert,


Thank you for your reply.


On 2017-04-12 23:49, Moore, Robert wrote:

>> On 2017-04-12 17:54, Moore, Robert wrote:
>> > And probably the dmesg if error messages appear in there.
>> 
>> Linux doesn’t log any messages, as the `tpm` module doesn’t load. 
>> Please
>> find the output of `sudo acpidump` attached.
>> 
>> […]
> 
> Do you have any idea what control method(s) are executing? The DSDT
> and SSDT in the acpidump load fine here, and all predefined control
> methods in these tables execute OK.

Sorry, I don’t know what’s done.

> We need to root-cause this problem, as a simple revert will break the
> customers that the fix was intended for in the first place.

I know, but I have no idea how to root-cause this. If nothing can be 
found, a revert is required by Linux’ no-regression-policy.


Kind regards,

Paul

^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2017-04-13  7:19 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-04-05 11:03 [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot Maciej S. Szmigiero
2017-04-05 13:36 ` Jarkko Sakkinen
2017-04-06  6:18 ` Paul Menzel
2017-04-06 11:52   ` Maciej S. Szmigiero
2017-04-06 16:55   ` Jason Gunthorpe
2017-04-06 18:26     ` Paul Menzel
2017-04-06 19:10       ` Jason Gunthorpe
2017-04-07 20:13         ` Jarkko Sakkinen
2017-04-07 20:58           ` Paul Menzel
2017-04-09 17:34             ` [Regression Linux 4.11] TPM module not loaded anymore (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot) Paul Menzel
2017-04-11 22:57               ` Jarkko Sakkinen
2017-04-12 15:46                 ` Moore, Robert
2017-04-12 15:52                 ` Moore, Robert
2017-04-12 15:54                 ` Moore, Robert
2017-04-12 21:26                   ` [Regression Linux 4.11] TPM module not loaded anymore Paul Menzel
2017-04-12 21:49                     ` Moore, Robert
2017-04-13  7:19                       ` Paul Menzel
2017-04-06 18:58     ` [tpmdd-devel] Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot Jarkko Sakkinen
2017-04-08 10:40     ` Denis 'GNUtoo' Carikli
2017-04-08 20:25       ` Jason Gunthorpe

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).