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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	npiggin@gmail.com
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v1 14/15] powerpc/32: Use r1 directly instead of r11 in exception prologs on 6xx/8xx
Date: Tue, 22 Dec 2020 13:28:36 +0000 (UTC)	[thread overview]
Message-ID: <96d5c555f5b50717c655cfe10b382e9fbba9abc9.1608641533.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>

r1 and r11 are both pointing to the stack. Use r1 and free up r11.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/kernel/entry_32.S       |  4 ++++
 arch/powerpc/kernel/head_6xx_8xx.h   | 28 ++++++++++++++--------------
 arch/powerpc/kernel/head_8xx.S       | 10 +++++-----
 arch/powerpc/kernel/head_book3s_32.S |  6 +++---
 4 files changed, 26 insertions(+), 22 deletions(-)

diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 2c38106c2c93..2ec3aa712282 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -318,7 +318,11 @@ stack_ovf:
 	ori	r12,r12,_end@l
 	cmplw	r1,r12
 	ble	5b			/* r1 <= &_end is OK */
+#ifdef CONFIG_HAVE_ARCH_VMAP_STACK
+	SAVE_NVGPRS(r1)
+#else
 	SAVE_NVGPRS(r11)
+#endif
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	lis	r1,init_thread_union@ha
 	addi	r1,r1,init_thread_union@l
diff --git a/arch/powerpc/kernel/head_6xx_8xx.h b/arch/powerpc/kernel/head_6xx_8xx.h
index bedbf37c2a0c..5a90bafee536 100644
--- a/arch/powerpc/kernel/head_6xx_8xx.h
+++ b/arch/powerpc/kernel/head_6xx_8xx.h
@@ -59,34 +59,33 @@
 1:
 	stw	r11,GPR1(r1)
 	stw	r11,0(r1)
-	mr	r11, r1
-	stw	r10,_CCR(r11)		/* save registers */
-	stw	r12,GPR12(r11)
-	stw	r9,GPR9(r11)
+	stw	r10,_CCR(r1)		/* save registers */
+	stw	r12,GPR12(r1)
+	stw	r9,GPR9(r1)
 	mfspr	r10,SPRN_SPRG_SCRATCH0
 	mfspr	r12,SPRN_SPRG_SCRATCH1
-	stw	r10,GPR10(r11)
-	stw	r12,GPR11(r11)
+	stw	r10,GPR10(r1)
+	stw	r12,GPR11(r1)
 	mflr	r10
-	stw	r10,_LINK(r11)
+	stw	r10,_LINK(r1)
 	mfspr	r12, SPRN_SPRG_THREAD
 	tovirt(r12, r12)
 	.if	\handle_dar_dsisr
 	lwz	r10, DAR(r12)
-	stw	r10, _DAR(r11)
+	stw	r10, _DAR(r1)
 	lwz	r10, DSISR(r12)
-	stw	r10, _DSISR(r11)
+	stw	r10, _DSISR(r1)
 	.endif
 	lwz	r9, SRR1(r12)
 	lwz	r12, SRR0(r12)
 	li	r10, MSR_KERNEL		/* can take exceptions */
 	mtmsr	r10			/* (except for mach check in rtas) */
-	stw	r0,GPR0(r11)
+	stw	r0,GPR0(r1)
 	lis	r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
 	addi	r10,r10,STACK_FRAME_REGS_MARKER@l
-	stw	r10,8(r11)
-	SAVE_4GPRS(3, r11)
-	SAVE_2GPRS(7, r11)
+	stw	r10,8(r1)
+	SAVE_4GPRS(3, r1)
+	SAVE_2GPRS(7, r1)
 .endm
 
 .macro SYSCALL_ENTRY trapno
@@ -196,7 +195,8 @@
 
 #define EXC_XFER_TEMPLATE(hdlr, trap, tfer, ret)		\
 	li	r10,trap;					\
-	stw	r10,_TRAP(r11);					\
+	mr	r11, r1;					\
+	stw	r10,_TRAP(r1);					\
 	bl	tfer;						\
 	.long	hdlr;						\
 	.long	ret
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 6fa8e58c6e4c..7a078b26d24c 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -316,8 +316,8 @@ InstructionTLBError:
 	tlbie	r12
 	/* 0x400 is InstructionAccess exception, needed by bad_page_fault() */
 .Litlbie:
-	stw	r12, _DAR(r11)
-	stw	r5, _DSISR(r11)
+	stw	r12, _DAR(r1)
+	stw	r5, _DSISR(r1)
 	EXC_XFER_LITE(0x400, handle_page_fault)
 
 /* This is the data TLB error on the MPC8xx.  This could be due to
@@ -335,8 +335,8 @@ DARFixed:/* Return from dcbx instruction bug workaround */
 	mtspr	SPRN_DAR, r11	/* Tag DAR, to be used in DTLB Error */
 	EXCEPTION_PROLOG_1
 	EXCEPTION_PROLOG_2 handle_dar_dsisr=1
-	lwz	r4, _DAR(r11)
-	lwz	r5, _DSISR(r11)
+	lwz	r4, _DAR(r1)
+	lwz	r5, _DSISR(r1)
 	andis.	r10,r5,DSISR_NOHPTE@h
 	beq+	.Ldtlbie
 	tlbie	r4
@@ -358,7 +358,7 @@ do_databreakpoint:
 	EXCEPTION_PROLOG_2 handle_dar_dsisr=1
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	mfspr	r4,SPRN_BAR
-	stw	r4,_DAR(r11)
+	stw	r4,_DAR(r1)
 	EXC_XFER_STD(0x1c00, do_break)
 
 	. = 0x1c00
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 19a1ae0697fc..40ee63af84f2 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -333,8 +333,8 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 	EXCEPTION_PROLOG_1
 	EXCEPTION_PROLOG_2
 	andis.	r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
-	stw	r12, _DAR(r11)
-	stw	r5, _DSISR(r11)
+	stw	r12, _DAR(r1)
+	stw	r5, _DSISR(r1)
 	EXC_XFER_LITE(0x400, handle_page_fault)
 
 /* External interrupt */
@@ -653,7 +653,7 @@ alignment_exception_tramp:
 
 handle_page_fault_tramp_1:
 	EXCEPTION_PROLOG_2 handle_dar_dsisr=1
-	lwz	r5, _DSISR(r11)
+	lwz	r5, _DSISR(r1)
 	andis.	r0, r5, DSISR_DABRMATCH@h
 	bne-	1f
 	EXC_XFER_LITE(0x300, handle_page_fault)
-- 
2.25.0


  parent reply	other threads:[~2020-12-22 13:30 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-22 13:28 [PATCH v1 00/15] powerpc/32: Reduce head complexity and re-activate MMU earlier Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 01/15] powerpc/32: Fix vmap stack - Properly set r1 before activating MMU on syscall too Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 02/15] powerpc/32s: Fix RTAS machine check with VMAP stack Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 03/15] powerpc/32s: Only build hash code when CONFIG_PPC_BOOK3S_604 is selected Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 04/15] powerpc/32s: Do DABR match out of handle_page_fault() Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 05/15] powerpc: Remove address argument from bad_page_fault() Christophe Leroy
2020-12-27  3:43   ` Nicholas Piggin
2020-12-22 13:28 ` [PATCH v1 06/15] powerpc: Remove address and errorcode arguments from do_break() Christophe Leroy
2020-12-27  3:25   ` Nicholas Piggin
2021-01-11  6:57     ` Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 07/15] powerpc: Remove address and errorcode arguments from do_page_fault() Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 08/15] powerpc/32: Split head_32.h into head_40x.h and head_6xx_8xx.h Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 09/15] powerpc/32: Preserve cr1 in exception prolog stack check Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 10/15] powerpc/32: Make VMAP stack code depend on HAVE_ARCH_VMAP_STACK Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 11/15] powerpc/32: Use r1 directly instead of r11 in syscall prolog Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 12/15] powerpc/32: Remove msr argument in EXC_XFER_TEMPLATE() on 6xx/8xx Christophe Leroy
2020-12-22 13:28 ` [PATCH v1 13/15] powerpc/32: Enable instruction translation at the same time as data translation Christophe Leroy
2020-12-22 13:28 ` Christophe Leroy [this message]
2020-12-22 13:28 ` [PATCH v1 15/15] powerpc/32: Use r11 to store DSISR in prolog Christophe Leroy

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