From: Jian Hu <jian.hu@amlogic.com>
To: Jerome Brunet <jbrunet@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>,
Carlo Caione <carlo@caione.org>, Rob Herring <robh@kernel.org>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Yixun Lan <yixun.lan@amlogic.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
<linux-clk@vger.kernel.org>, <linux-amlogic@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH 2/2] clk: meson-g12a: Add AO Clock controller driver
Date: Tue, 28 Aug 2018 11:35:32 +0800 [thread overview]
Message-ID: <977d8010-6d82-5eac-5da5-6dbe0f73971a@amlogic.com> (raw)
In-Reply-To: <89b058a7bba26058fab95dea01155221dbb642ce.camel@baylibre.com>
Hi: Jerome
On 2018/8/27 21:07, Jerome Brunet wrote:
> On Fri, 2018-08-24 at 21:34 +0800, Jian Hu wrote:
>>>
>>
>> I am confued about aoclk81's parent clocks.
>>
>> I can not get the example of axg audio clock driver, Could you provide
>> the link? Had it merged into clk-meson.git?
>
> Yes and mainline as well : drivers/clk/meson/axg-audio.c
>
> Basically this driver is creating bypass input clocks (audio_pclk, mst_in[0-9],
> etc...) .
>
> This allows to collect input clocks from DT (like any consumer should) will
> keeping constant in the controller clock tree.
>
>>From what I've seen of your controller drivers, the EE controller should have
> one input, the AO should have 3.
>
>
>
> .
>
I still can not get the example meaning in axg audio driver.
In 26 page of A113D_Datasheet V0.7 20170725-Baylibre.pdf,We can see the
aoclk81 has two parents. clk81 and ao_slow_clk. I can not get 3 parents.
clk81|\
-------| \ aoclk81
src0 |\ | |-------------------
-----| \ ao_slow_clk | |
| |---------------------| /
-----| / |/
src1|/
src0 is from xtal, if can generate 32k clock, but it is never used.
src1 is from gpio clock, It is never used. If necessary, the ao_slow_clk
maybe described.
So why aoclk81 has 3 parents?
next prev parent reply other threads:[~2018-08-28 3:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-10 9:54 [PATCH 0/2] clk: meson-g12a: Add AO clock controller driver Jian Hu
2018-08-10 9:54 ` [PATCH 1/2] dt-bindings: clk: meson-g12a: Add G12A AO Clock Bindings Jian Hu
2018-08-14 20:48 ` Rob Herring
2018-08-15 5:35 ` Jian Hu
2018-08-10 9:54 ` [PATCH 2/2] clk: meson-g12a: Add AO Clock controller driver Jian Hu
2018-08-14 12:40 ` Jerome Brunet
2018-08-24 13:34 ` Jian Hu
2018-08-27 13:07 ` Jerome Brunet
2018-08-28 3:35 ` Jian Hu [this message]
2018-09-14 8:33 ` Jerome Brunet
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