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Fri, 13 Sep 2019 02:00:48 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x8D20lSw46858692 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 13 Sep 2019 02:00:47 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1E896BE058; Fri, 13 Sep 2019 02:00:47 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7F809BE04F; Fri, 13 Sep 2019 02:00:44 +0000 (GMT) Received: from [9.199.46.176] (unknown [9.199.46.176]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Fri, 13 Sep 2019 02:00:44 +0000 (GMT) Subject: Re: [PATCH 2/3] powperc/mm: read TLB Block Invalidate Characteristics To: Laurent Dufour , mpe@ellerman.id.au, benh@kernel.crashing.org, paulus@samba.org, npiggin@gmail.com Cc: linuxppc-dev@lists.ozlabs.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org References: <20190830120712.22971-1-ldufour@linux.ibm.com> <20190830120712.22971-3-ldufour@linux.ibm.com> <87impxshfk.fsf@linux.ibm.com> <468a53a6-a970-5526-8035-eef59dcf48ed@linux.ibm.com> From: "Aneesh Kumar K.V" Message-ID: <97bafb53-6ae9-1d42-1816-ef81b845b80c@linux.ibm.com> Date: Fri, 13 Sep 2019 07:30:42 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <468a53a6-a970-5526-8035-eef59dcf48ed@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-09-13_01:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=856 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1909130019 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/13/19 12:56 AM, Laurent Dufour wrote: > Le 12/09/2019 à 16:44, Aneesh Kumar K.V a écrit : >> Laurent Dufour writes: >>> + >>> +    idx = 2; >>> +    while (idx < len) { >>> +        unsigned int block_size = local_buffer[idx++]; >>> +        unsigned int npsize; >>> + >>> +        if (!block_size) >>> +            break; >>> + >>> +        block_size = 1 << block_size; >>> +        if (block_size != 8) >>> +            /* We only support 8 bytes size TLB invalidate buffer */ >>> +            pr_warn("Unsupported H_BLOCK_REMOVE block size : %d\n", >>> +                block_size); >> >> Should we skip setting block size if we find block_size != 8? Also can >> we avoid doing that pr_warn in loop and only warn if we don't find >> block_size 8 in the invalidate characteristics array? > > My idea here is to fully read and process the data returned by the > hcall, and to put the limitation to 8 when checking before calling > H_BLOCK_REMOVE. > The warning is there because I want it to be displayed once at boot. > Can we have two block size reported for the same base page size/actual page size combination? If so we will overwrite the hblk[actual_psize] ? >> >>> + >>> +        for (npsize = local_buffer[idx++];  npsize > 0; npsize--) >>> +            check_lp_set_hblk((unsigned int) local_buffer[idx++], >>> +                      block_size); >>> +    } >>> + >>> +    for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++) >>> +        for (idx = 0; idx < MMU_PAGE_COUNT; idx++) >>> +            if (mmu_psize_defs[bpsize].hblk[idx]) >>> +                pr_info("H_BLOCK_REMOVE supports base psize:%d >>> psize:%d block size:%d", >>> +                    bpsize, idx, >>> +                    mmu_psize_defs[bpsize].hblk[idx]); >>> + >>> +    return 0; >>> +} >>> +machine_arch_initcall(pseries, read_tlbbi_characteristics); >>> + >>>   /* >>>    * Take a spinlock around flushes to avoid bouncing the hypervisor >>> tlbie >>>    * lock. -aneesh