From: "Cédric Le Goater" <clg@kaod.org>
To: Haren Myneni <haren@linux.ibm.com>, mpe@ellerman.id.au
Cc: mikey@neuling.org, srikar@linux.vnet.ibm.com,
frederic.barrat@fr.ibm.com, ajd@linux.ibm.com,
linux-kernel@vger.kernel.org, npiggin@gmail.com,
hch@infradead.org, oohall@gmail.com, sukadev@linux.vnet.ibm.com,
linuxppc-dev@lists.ozlabs.org, herbert@gondor.apana.org.au
Subject: Re: [PATCH v10 03/14] powerpc/vas: Alloc and setup IRQ and trigger port address
Date: Thu, 2 Apr 2020 10:08:05 +0200 [thread overview]
Message-ID: <99d4f018-0e2d-9ab4-b4d4-58af7e494ec3@kaod.org> (raw)
In-Reply-To: <1585811431.2275.39.camel@hbabu-laptop>
On 4/2/20 9:10 AM, Haren Myneni wrote:
>
> Allocate a xive irq on each chip with a vas instance. The NX coprocessor
> raises a host CPU interrupt via vas if it encounters page fault on user
> space request buffer. Subsequent patches register the trigger port with
> the NX coprocessor, and create a vas fault handler for this interrupt
> mapping.
Looks good !
> Signed-off-by: Haren Myneni <haren@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
> ---
> arch/powerpc/platforms/powernv/vas.c | 44 +++++++++++++++++++++++++++++++-----
> arch/powerpc/platforms/powernv/vas.h | 2 ++
> 2 files changed, 40 insertions(+), 6 deletions(-)
>
> diff --git a/arch/powerpc/platforms/powernv/vas.c b/arch/powerpc/platforms/powernv/vas.c
> index ed9cc6d..3303cfe 100644
> --- a/arch/powerpc/platforms/powernv/vas.c
> +++ b/arch/powerpc/platforms/powernv/vas.c
> @@ -15,6 +15,7 @@
> #include <linux/of_address.h>
> #include <linux/of.h>
> #include <asm/prom.h>
> +#include <asm/xive.h>
>
> #include "vas.h"
>
> @@ -25,10 +26,12 @@
>
> static int init_vas_instance(struct platform_device *pdev)
> {
> - int rc, cpu, vasid;
> - struct resource *res;
> - struct vas_instance *vinst;
> struct device_node *dn = pdev->dev.of_node;
> + struct vas_instance *vinst;
> + struct xive_irq_data *xd;
> + uint32_t chipid, hwirq;
> + struct resource *res;
> + int rc, cpu, vasid;
>
> rc = of_property_read_u32(dn, "ibm,vas-id", &vasid);
> if (rc) {
> @@ -36,6 +39,12 @@ static int init_vas_instance(struct platform_device *pdev)
> return -ENODEV;
> }
>
> + rc = of_property_read_u32(dn, "ibm,chip-id", &chipid);
> + if (rc) {
> + pr_err("No ibm,chip-id property for %s?\n", pdev->name);
> + return -ENODEV;
> + }
> +
> if (pdev->num_resources != 4) {
> pr_err("Unexpected DT configuration for [%s, %d]\n",
> pdev->name, vasid);
> @@ -69,9 +78,32 @@ static int init_vas_instance(struct platform_device *pdev)
>
> vinst->paste_win_id_shift = 63 - res->end;
>
> - pr_devel("Initialized instance [%s, %d], paste_base 0x%llx, "
> - "paste_win_id_shift 0x%llx\n", pdev->name, vasid,
> - vinst->paste_base_addr, vinst->paste_win_id_shift);
> + hwirq = xive_native_alloc_irq_on_chip(chipid);
> + if (!hwirq) {
> + pr_err("Inst%d: Unable to allocate global irq for chip %d\n",
> + vinst->vas_id, chipid);
> + return -ENOENT;
> + }
> +
> + vinst->virq = irq_create_mapping(NULL, hwirq);
> + if (!vinst->virq) {
> + pr_err("Inst%d: Unable to map global irq %d\n",
> + vinst->vas_id, hwirq);
> + return -EINVAL;
> + }
> +
> + xd = irq_get_handler_data(vinst->virq);
> + if (!xd) {
> + pr_err("Inst%d: Invalid virq %d\n",
> + vinst->vas_id, vinst->virq);
> + return -EINVAL;
> + }
> +
> + vinst->irq_port = xd->trig_page;
> + pr_devel("Initialized instance [%s, %d] paste_base 0x%llx paste_win_id_shift 0x%llx IRQ %d Port 0x%llx\n",
> + pdev->name, vasid, vinst->paste_base_addr,
> + vinst->paste_win_id_shift, vinst->virq,
> + vinst->irq_port);
>
> for_each_possible_cpu(cpu) {
> if (cpu_to_chip_id(cpu) == of_get_ibm_chip_id(dn))
> diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h
> index 5574aec..598608b 100644
> --- a/arch/powerpc/platforms/powernv/vas.h
> +++ b/arch/powerpc/platforms/powernv/vas.h
> @@ -313,6 +313,8 @@ struct vas_instance {
> u64 paste_base_addr;
> u64 paste_win_id_shift;
>
> + u64 irq_port;
> + int virq;
> struct mutex mutex;
> struct vas_window *rxwin[VAS_COP_TYPE_MAX];
> struct vas_window *windows[VAS_WINDOWS_PER_CHIP];
>
next prev parent reply other threads:[~2020-04-02 8:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-02 7:00 [PATCH v10 00/14] powerpc/vas: Page fault handling for user space NX requests Haren Myneni
2020-04-02 7:09 ` [PATCH v10 01/14] powerpc/xive: Define xive_native_alloc_irq_on_chip() Haren Myneni
2020-04-02 7:09 ` [PATCH v10 02/14] powerpc/vas: Define nx_fault_stamp in coprocessor_request_block Haren Myneni
2020-04-02 7:10 ` [PATCH v10 03/14] powerpc/vas: Alloc and setup IRQ and trigger port address Haren Myneni
2020-04-02 8:08 ` Cédric Le Goater [this message]
2020-04-02 7:11 ` [PATCH v10 04/14] powerpc/vas: Setup fault window per VAS instance Haren Myneni
2020-04-02 7:11 ` [PATCH v10 05/14] powerpc/vas: Register NX with fault window ID and IRQ port value Haren Myneni
2020-04-02 7:13 ` [PATCH v10 06/14] powerpc/vas: Take reference to PID and mm for user space windows Haren Myneni
2020-04-02 7:13 ` [PATCH v10 07/14] powerpc/vas: Setup thread IRQ handler per VAS instance Haren Myneni
2020-04-02 7:14 ` [PATCH v10 08/14] powerpc/vas: Update CSB and notify process for fault CRBs Haren Myneni
2020-04-02 7:15 ` [PATCH v10 09/14] powerpc/vas: Return credits after handling fault Haren Myneni
2020-04-02 7:16 ` [PATCH v10 10/14] powerpc/vas: Print CRB and FIFO values Haren Myneni
2020-04-02 7:17 ` [PATCH v10 11/14] powerpc/vas: Do not use default credits for receive window Haren Myneni
2020-04-02 7:18 ` [PATCH v10 12/14] powerpc/vas: Display process stuck message Haren Myneni
2020-04-02 7:19 ` [PATCH v10 13/14] powerpc/vas: Free send window in VAS instance after credits returned Haren Myneni
2020-04-02 7:20 ` [PATCH v10 14/14] powerpc: Use mm_context vas_windows counter to issue CP_ABORT Haren Myneni
2020-04-11 10:28 ` Michael Ellerman
2020-04-14 7:54 ` Haren Myneni
2020-04-03 8:19 ` [PATCH v10 00/14] powerpc/vas: Page fault handling for user space NX requests Cédric Le Goater
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