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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id j17-20020a056512399100b004b257fef958sm508060lfu.94.2022.11.25.04.12.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 25 Nov 2022 04:12:20 -0800 (PST) Message-ID: <9b0f8312-2caa-b9f3-edf3-1b720532f559@linaro.org> Date: Fri, 25 Nov 2022 13:12:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH v4 6/7] dt-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller Content-Language: en-US To: "Lad, Prabhakar" Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Geert Uytterhoeven , Magnus Damm , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Guo Ren , Jisheng Zhang , Atish Patra , Anup Patel , Andrew Jones , Nathan Chancellor , Philipp Tomsich , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Biju Das , Lad Prabhakar References: <20221124172207.153718-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20221124172207.153718-7-prabhakar.mahadev-lad.rj@bp.renesas.com> <70d1bfde-f57f-1741-08d3-23e362793595@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/11/2022 11:34, Lad, Prabhakar wrote: >>> +/* Device, Non-bufferable */ >>> +#define AX45MP_PMACFG_MTYP_DEV_NON_BUF (0 << 2) >>> +/* Device, bufferable */ >>> +#define AX45MP_PMACFG_MTYP_DEV_BUF (1 << 2) >>> +/* Memory, Non-cacheable, Non-bufferable */ >>> +#define AX45MP_PMACFG_MTYP_MEM_NON_CACHE_NON_BUF (2 << 2) >>> +/* Memory, Non-cacheable, Bufferable */ >>> +#define AX45MP_PMACFG_MTYP_MEM_NON_CACHE_BUF (3 << 2) >> >> What are all these? They don't look like flags, because 3 = 1 | 2... >> they don't look like constants, because we do not use shifts in >> constants. Are these some register values? I also do not see the header >> being used in the code, so why having a bindings header if it is not >> used (DTS is not usage...)? >> > These are register bit values for the MTYP[5:2] field. The DTS example > in the binding doc (above) uses these macros. I haven't included the > DTS/I patches with this patchset yet do think I should? Then why storing it as bindings? Bindings headers describe the interface implemented by drivers and used by DTS, but this is not implemented by drivers. Best regards, Krzysztof