From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5374AC47082 for ; Thu, 3 Jun 2021 18:25:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3972E613D7 for ; Thu, 3 Jun 2021 18:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbhFCS1I (ORCPT ); Thu, 3 Jun 2021 14:27:08 -0400 Received: from polaris.svanheule.net ([84.16.241.116]:42912 "EHLO polaris.svanheule.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229675AbhFCS1G (ORCPT ); Thu, 3 Jun 2021 14:27:06 -0400 Received: from terra.local.svanheule.net (unknown [IPv6:2a02:a03f:eafb:ee01:eb34:edf2:c0ff:9e88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 8D1AC2082E3; Thu, 3 Jun 2021 20:25:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1622744720; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mkiOZ138uflRvbn1upqMjb/H1A5Yo7JBTsjLV+GJWcU=; b=U3/YVz1dYc8KcqXk/eSemMGv1VHV4kLgBJyz0+sF3tZ/ilmvgsjp5YJw9GxN+PsZf/GW3j pSsilnX8SREQe2b2qG15HmUjeYE9Gp2qe4hBFOGFpJlXoqH2Bd16+9pQZ+FEik/DQ1RfQy bSOmL6L9HRqE4tH1GrjqhOOLkV98z2ZF9AiZADJv+ixaJ9pZQIGE5fxUettCj/OhShs4XH /wcFev0ktmHuvyn/POtlPhqRsbaDV6AgEX5XfrB89cdpnSGpQAfkMt57QNRUq8RtKJFK7e 66XCTUMjlDf7eJhftF4EE0gm+gBk9sFyO3zBS8RP3JYQBUnV4L+vKYnGzmt8bQ== From: Sander Vanheule To: Mark Brown , Andrew Lunn , Greg Kroah-Hartman , "Rafael J . Wysocki" , Andy Shevchenko Cc: linux-kernel@vger.kernel.org, Sander Vanheule Subject: [RFC PATCH 2/2] regmap: mdio: Add clause-45 support Date: Thu, 3 Jun 2021 20:25:10 +0200 Message-Id: <9cc263e3e7d5865edd90453b4183f1cf363cb636.1622743333.git.sander@svanheule.net> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Modern ethernet phys support the so-called clause-45 register access mode, which allows for register address widths of 16 bit. Also allow for 16-bit register address widths, and return a regmap for clause-45 access in that case. Signed-off-by: Sander Vanheule --- drivers/base/regmap/regmap-mdio.c | 70 ++++++++++++++++++++++++------- 1 file changed, 56 insertions(+), 14 deletions(-) diff --git a/drivers/base/regmap/regmap-mdio.c b/drivers/base/regmap/regmap-mdio.c index aee34bf2400e..cfb23afb19eb 100644 --- a/drivers/base/regmap/regmap-mdio.c +++ b/drivers/base/regmap/regmap-mdio.c @@ -7,13 +7,14 @@ #define REGVAL_MASK GENMASK(15, 0) #define REGNUM_C22_MASK GENMASK(4, 0) +/* Clause-45 mask includes the device type (5 bit) and actual register number (16 bit) */ +#define REGNUM_C45_MASK GENMASK(20, 0) -static int regmap_mdio_read(void *context, unsigned int reg, unsigned int *val) +static int regmap_mdio_read(struct mdio_device *mdio_dev, u32 reg, unsigned int *val) { - struct mdio_device *mdio_dev = context; int ret; - ret = mdiobus_read(mdio_dev->bus, mdio_dev->addr, reg & REGNUM_C22_MASK); + ret = mdiobus_read(mdio_dev->bus, mdio_dev->addr, reg); if (ret < 0) return ret; @@ -21,27 +22,63 @@ static int regmap_mdio_read(void *context, unsigned int reg, unsigned int *val) return 0; } -static int regmap_mdio_write(void *context, unsigned int reg, unsigned int val) +static int regmap_mdio_write(struct mdio_device *mdio_dev, u32 reg, unsigned int val) +{ + return mdiobus_write(mdio_dev->bus, mdio_dev->addr, reg, val); +} + +static int regmap_mdio_c22_read(void *context, unsigned int reg, unsigned int *val) +{ + struct mdio_device *mdio_dev = context; + + return regmap_mdio_read(mdio_dev, reg & REGNUM_C22_MASK, val); +} + +static int regmap_mdio_c22_write(void *context, unsigned int reg, unsigned int val) { struct mdio_device *mdio_dev = context; - return mdiobus_write(mdio_dev->bus, mdio_dev->addr, reg & REGNUM_C22_MASK, val); + return regmap_mdio_write(mdio_dev, reg & REGNUM_C22_MASK, val); } -static const struct regmap_bus regmap_mdio_bus = { - .reg_write = regmap_mdio_write, - .reg_read = regmap_mdio_read, +static const struct regmap_bus regmap_mdio_c22_bus = { + .reg_write = regmap_mdio_c22_write, + .reg_read = regmap_mdio_c22_read, +}; + +static int regmap_mdio_c45_read(void *context, unsigned int reg, unsigned int *val) +{ + struct mdio_device *mdio_dev = context; + + return regmap_mdio_read(mdio_dev, MII_ADDR_C45 | (reg & REGNUM_C45_MASK), val); +} + +static int regmap_mdio_c45_write(void *context, unsigned int reg, unsigned int val) +{ + struct mdio_device *mdio_dev = context; + + return regmap_mdio_write(mdio_dev, MII_ADDR_C45 | (reg & REGNUM_C45_MASK), val); +} + +static const struct regmap_bus regmap_mdio_c45_bus = { + .reg_write = regmap_mdio_c45_write, + .reg_read = regmap_mdio_c45_read, }; struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name) { - if (config->reg_bits != 5 || config->val_bits != 16) + struct regmap_bus *bus; + + if (config->reg_bits == 5 && config->val_bits == 16) + bus = ®map_mdio_c22_bus; + else if (config->reg_bits == 21 && config->val_bits == 16) + bus = ®map_mdio_c45_bus; + else return ERR_PTR(-EOPNOTSUPP); - return __regmap_init(&mdio_dev->dev, ®map_mdio_bus, mdio_dev, config, - lock_key, lock_name); + return __regmap_init(&mdio_dev->dev, bus, mdio_dev, config, lock_key, lock_name); } EXPORT_SYMBOL_GPL(__regmap_init_mdio); @@ -49,11 +86,16 @@ struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name) { - if (config->reg_bits != 5 || config->val_bits != 16) + const struct regmap_bus *bus; + + if (config->reg_bits == 5 && config->val_bits == 16) + bus = ®map_mdio_c22_bus; + else if (config->reg_bits == 21 && config->val_bits == 16) + bus = ®map_mdio_c45_bus; + else return ERR_PTR(-EOPNOTSUPP); - return __devm_regmap_init(&mdio_dev->dev, ®map_mdio_bus, mdio_dev, - config, lock_key, lock_name); + return __devm_regmap_init(&mdio_dev->dev, bus, mdio_dev, config, lock_key, lock_name); } EXPORT_SYMBOL_GPL(__devm_regmap_init_mdio); -- 2.31.1