From: Bart Van Assche <bvanassche@acm.org>
To: Kiwoong Kim <kwmad.kim@samsung.com>,
linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org,
alim.akhtar@samsung.com, avri.altman@wdc.com, jejb@linux.ibm.com,
martin.petersen@oracle.com, beanhuo@micron.com,
cang@codeaurora.org, adrian.hunter@intel.com, sc.suh@samsung.com,
hy50.seo@samsung.com, sh425.lee@samsung.com,
bhoon95.kim@samsung.com
Subject: Re: [RFC PATCH v1 1/2] scsi: ufs: introduce vendor isr
Date: Fri, 6 Aug 2021 09:18:37 -0700 [thread overview]
Message-ID: <9ed9f56c-d7a4-8e68-0968-da0eccb0b38d@acm.org> (raw)
In-Reply-To: <0f6f2337e98f8a8a7dfae816bc001af28fa3a7be.1628231581.git.kwmad.kim@samsung.com>
On 8/5/21 11:34 PM, Kiwoong Kim wrote:
> This patch is to activate some interrupt sources
> that aren't defined in UFSHCI specifications. Those
> purpose could be error handling, workaround or whatever.
>
> Signed-off-by: Kiwoong Kim <kwmad.kim@samsung.com>
> ---
> drivers/scsi/ufs/ufshcd.c | 10 ++++++++++
> drivers/scsi/ufs/ufshcd.h | 8 ++++++++
> 2 files changed, 18 insertions(+)
>
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index 05495c34a2b7..f85a9b335e0b 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -6428,6 +6428,16 @@ static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
> static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
> {
> irqreturn_t retval = IRQ_NONE;
> + int res = 0;
> + unsigned long flags;
> +
> + retval = ufshcd_vops_intr(hba, &res);
> + if (res) {
> + spin_lock_irqsave(hba->host->host_lock, flags);
> + hba->force_reset = true;
> + ufshcd_schedule_eh_work(hba);
> + spin_unlock_irqrestore(hba->host->host_lock, flags);
> + }
How can a non-standard extension have error handling code in common
code? Please move the code under if (res) into the vendor code.
> if (intr_status & UFSHCD_UIC_MASK)
> retval |= ufshcd_uic_cmd_compl(hba, intr_status);
> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
> index 971cfabc4a1e..1ed0a911f864 100644
> --- a/drivers/scsi/ufs/ufshcd.h
> +++ b/drivers/scsi/ufs/ufshcd.h
> @@ -356,6 +356,7 @@ struct ufs_hba_variant_ops {
> const union ufs_crypto_cfg_entry *cfg, int slot);
> void (*event_notify)(struct ufs_hba *hba,
> enum ufs_event_type evt, void *data);
> + irqreturn_t (*intr)(struct ufs_hba *hba, int *res);
> };
>
> /* clock gating state */
> @@ -1296,6 +1297,13 @@ static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
> hba->vops->config_scaling_param(hba, profile, data);
> }
>
> +static inline irqreturn_t ufshcd_vops_intr(struct ufs_hba *hba, int *res)
> +{
> + if (hba->vops && hba->vops->intr)
> + return hba->vops->intr(hba, res);
> + return IRQ_NONE;
> +}
> +
> extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
So this code adds an indirect function call in the interrupt handler?
This will have a negative impact on performance, especially on a kernel
with security mitigations enabled. See also
https://lwn.net/Articles/774743/.
Thanks,
Bart.
next prev parent reply other threads:[~2021-08-06 16:18 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20210806064923epcas2p13dd6b442eed02404d87684afd9c1b229@epcas2p1.samsung.com>
2021-08-06 6:34 ` [RFC PATCH v1 0/2] scsi: ufs: introduce vendor isr Kiwoong Kim
[not found] ` <CGME20210806064924epcas2p4572538fd1fa7a73d8262737e38a9b537@epcas2p4.samsung.com>
2021-08-06 6:34 ` [RFC PATCH v1 1/2] " Kiwoong Kim
2021-08-06 16:18 ` Bart Van Assche [this message]
2021-08-09 7:33 ` Kiwoong Kim
[not found] ` <CGME20210806064925epcas2p2ba7e711758614384c17648d4924d025c@epcas2p2.samsung.com>
2021-08-06 6:34 ` [RFC PATCH v1 2/2] scsi: ufs: ufs-exynos: implement exynos isr Kiwoong Kim
2021-08-06 16:37 ` Bart Van Assche
2021-08-09 7:31 ` Kiwoong Kim
2021-08-06 16:14 ` [RFC PATCH v1 0/2] scsi: ufs: introduce vendor isr Bart Van Assche
2021-08-08 5:56 ` Avri Altman
2021-08-09 7:46 ` Kiwoong Kim
2021-08-09 16:08 ` Bart Van Assche
2021-08-13 5:31 ` Kiwoong Kim
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