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From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: Maxim Levitsky <mlevitsk@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: seanjc@google.com, joro@8bytes.org, jon.grimm@amd.com,
	wei.huang2@amd.com, terry.bowman@amd.com
Subject: Re: [PATCH v6 15/17] KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible
Date: Tue, 28 Jun 2022 09:35:28 +0700	[thread overview]
Message-ID: <9f3ffe16-2516-d4ec-528e-6347ef884ad5@amd.com> (raw)
In-Reply-To: <d761ef283bc91002322f3cd66c124d329c25f04f.camel@redhat.com>



On 6/28/2022 5:55 AM, Maxim Levitsky wrote:
> On Fri, 2022-06-24 at 18:41 +0200, Paolo Bonzini wrote:
>> On 5/19/22 12:27, Suravee Suthikulpanit wrote:
>>> +			 * If the x2APIC logical ID sub-field (i.e. icrh[15:0]) contains zero
>>> +			 * or more than 1 bits, we cannot match just one vcpu to kick for
>>> +			 * fast path.
>>> +			 */
>>> +			if (!first || (first != last))
>>> +				return -EINVAL;
>>> +
>>> +			apic = first - 1;
>>> +			if ((apic < 0) || (apic > 15) || (cluster >= 0xfffff))
>>> +				return -EINVAL;
>>
>> Neither of these is possible: first == 0 has been cheked above, and
>> ffs(icrh & 0xffff) cannot exceed 15.  Likewise, cluster is actually
>> limited to 16 bits, not 20.
>>
>> Plus, C is not Pascal so no parentheses. :)
>>
>> Putting everything together, it can be simplified to this:
>>
>> +                       int cluster = (icrh & 0xffff0000) >> 16;
>> +                       int apic = ffs(icrh & 0xffff) - 1;
>> +
>> +                       /*
>> +                        * If the x2APIC logical ID sub-field (i.e. icrh[15:0])
>> +                        * contains anything but a single bit, we cannot use the
>> +                        * fast path, because it is limited to a single vCPU.
>> +                        */
>> +                       if (apic < 0 || icrh != (1 << apic))
>> +                               return -EINVAL;
>> +
>> +                       l1_physical_id = (cluster << 4) + apic;
>>
>>
>>> +			apic_id = (cluster << 4) + apic;
> 
> Hi Paolo and Suravee Suthikulpanit!
> 
> Note that this patch is not needed anymore, I fixed the avic_kick_target_vcpus_fast function,
> and added the support for x2apic because it was very easy to do
> (I already needed to parse logical id for flat and cluser modes)
> 
> Best regards,
> 	Maxim Levitsky
> 

Understood. I was about to send v7 to remove this patch from the series, but too late. I'll test the current queue branch and provide update.

Best Regards,
Suravee

  reply	other threads:[~2022-06-28  2:38 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-19 10:26 [PATCH v6 00/17] Introducing AMD x2AVIC and hybrid-AVIC modes Suravee Suthikulpanit
2022-05-19 10:26 ` [PATCH v6 01/17] x86/cpufeatures: Introduce x2AVIC CPUID bit Suravee Suthikulpanit
2022-06-24 16:08   ` Paolo Bonzini
2022-05-19 10:26 ` [PATCH v6 02/17] KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD Suravee Suthikulpanit
2022-06-24 16:08   ` Paolo Bonzini
2022-05-19 10:26 ` [PATCH v6 03/17] KVM: SVM: Detect X2APIC virtualization (x2AVIC) support Suravee Suthikulpanit
2022-05-19 10:26 ` [PATCH v6 04/17] KVM: SVM: Update max number of vCPUs supported for x2AVIC mode Suravee Suthikulpanit
2022-05-19 10:26 ` [PATCH v6 05/17] KVM: SVM: Update avic_kick_target_vcpus to support 32-bit APIC ID Suravee Suthikulpanit
2022-05-19 10:26 ` [PATCH v6 06/17] KVM: SVM: Do not support updating APIC ID when in x2APIC mode Suravee Suthikulpanit
2022-05-19 10:26 ` [PATCH v6 07/17] KVM: SVM: Adding support for configuring x2APIC MSRs interception Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 08/17] KVM: x86: Deactivate APICv on vCPU with APIC disabled Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 09/17] KVM: SVM: Refresh AVIC configuration when changing APIC mode Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 10/17] KVM: x86: nSVM: always intercept x2apic msrs Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 11/17] KVM: SVM: Introduce logic to (de)activate x2AVIC mode Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 12/17] KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 13/17] KVM: SVM: Introduce hybrid-AVIC mode Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 14/17] KVM: x86: Warning APICv inconsistency only when vcpu APIC mode is valid Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 15/17] KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible Suravee Suthikulpanit
2022-06-24 16:41   ` Paolo Bonzini
2022-06-27 22:55     ` Maxim Levitsky
2022-06-28  2:35       ` Suthikulpanit, Suravee [this message]
2022-06-28  8:59         ` Maxim Levitsky
2022-06-28 12:36           ` Suthikulpanit, Suravee
2022-06-28 13:14             ` Maxim Levitsky
2022-05-19 10:27 ` [PATCH v6 16/17] KVM: SVM: Add AVIC doorbell tracepoint Suravee Suthikulpanit
2022-05-19 10:27 ` [PATCH v6 17/17] KVM: x86: nSVM: optimize svm_set_x2apic_msr_interception Suravee Suthikulpanit
2022-06-06 23:05 ` [PATCH v6 00/17] Introducing AMD x2AVIC and hybrid-AVIC modes Jim Mattson
2022-06-24 17:04 ` Paolo Bonzini
2022-06-28 13:20 ` Suthikulpanit, Suravee
2022-06-28 13:43   ` Maxim Levitsky
2022-06-28 16:34     ` Suthikulpanit, Suravee
2022-06-29  7:10       ` Maxim Levitsky

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